[PATCH 2/4] arm64: dts: imx952-evk: Add sound-wm8962 support
Shengjiu Wang
shengjiu.wang at gmail.com
Thu Mar 12 02:49:09 PDT 2026
On Thu, Mar 12, 2026 at 5:45 PM Alexander Stein
<alexander.stein at ew.tq-group.com> wrote:
>
> Am Donnerstag, 12. März 2026, 04:49:10 CET schrieb Shengjiu Wang:
> > Add wm8962 sound card. By connecting with ASRC1, the sound card support
> > sample rate conversion.
> >
> > Signed-off-by: Shengjiu Wang <shengjiu.wang at nxp.com>
> > ---
> > arch/arm64/boot/dts/freescale/imx952-evk.dts | 119 +++++++++++++++++++
> > 1 file changed, 119 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx952-evk.dts b/arch/arm64/boot/dts/freescale/imx952-evk.dts
> > index 509704c23e89..ef0058b98573 100644
> > --- a/arch/arm64/boot/dts/freescale/imx952-evk.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx952-evk.dts
> > @@ -110,6 +110,15 @@ reg_vref_1v8: regulator-adc-vref {
> > regulator-max-microvolt = <1800000>;
> > };
> >
> > + reg_audio_pwr: regulator-audio-pwr {
> > + compatible = "regulator-fixed";
> > + regulator-name = "audio-pwr";
> > + regulator-max-microvolt = <3300000>;
> > + regulator-min-microvolt = <3300000>;
> > + gpio = <&i2c4_pcal6408 1 GPIO_ACTIVE_HIGH>;
> > + enable-active-high;
> > + };
> > +
> > reg_usdhc2_vmmc: regulator-usdhc2 {
> > compatible = "regulator-fixed";
> > pinctrl-names = "default";
> > @@ -131,6 +140,51 @@ reg_usb_vbus: regulator-vbus {
> > enable-active-high;
> > };
> >
> > + sound-wm8962 {
> > + compatible = "fsl,imx-audio-wm8962";
> > + audio-asrc = <&asrc1>;
> > + audio-codec = <&wm8962>;
> > + audio-cpu = <&sai3>;
> > + audio-routing = "Headphone Jack", "HPOUTL",
> > + "Headphone Jack", "HPOUTR",
> > + "Ext Spk", "SPKOUTL",
> > + "Ext Spk", "SPKOUTR",
> > + "AMIC", "MICBIAS",
> > + "IN3R", "AMIC",
> > + "IN1R", "AMIC";
> > + hp-det-gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
> > + model = "wm8962-audio";
> > + pinctrl-0 = <&pinctrl_hp>;
> > + pinctrl-names = "default";
> > + };
> > +};
> > +
> > +&asrc1 {
> > + assigned-clocks = <&scmi_clk IMX952_CLK_AUDIOPLL1_VCO>,
> > + <&scmi_clk IMX952_CLK_AUDIOPLL2_VCO>,
> > + <&scmi_clk IMX952_CLK_AUDIOPLL1>,
> > + <&scmi_clk IMX952_CLK_AUDIOPLL2>,
> > + <&scmi_clk IMX952_CLK_ASRC1>;
> > + assigned-clock-parents = <0>, <0>, <0>, <0>,
> > + <&scmi_clk IMX952_CLK_AUDIOPLL1>;
> > + assigned-clock-rates = <3932160000>, <3612672000>,
> > + <393216000>, <361267200>, <49152000>;
> > + fsl,asrc-rate = <48000>;
> > + status = "okay";
> > +};
> > +
> > +&asrc2 {
> > + assigned-clocks = <&scmi_clk IMX952_CLK_AUDIOPLL1_VCO>,
> > + <&scmi_clk IMX952_CLK_AUDIOPLL2_VCO>,
> > + <&scmi_clk IMX952_CLK_AUDIOPLL1>,
> > + <&scmi_clk IMX952_CLK_AUDIOPLL2>,
> > + <&scmi_clk IMX952_CLK_ASRC2>;
> > + assigned-clock-parents = <0>, <0>, <0>, <0>,
> > + <&scmi_clk IMX952_CLK_AUDIOPLL1>;
> > + assigned-clock-rates = <3932160000>, <3612672000>,
> > + <393216000>, <361267200>, <49152000>;
> > + fsl,asrc-rate = <48000>;
> > + status = "okay";
>
> Is asrc2 actually required? AFAICS this is not referenced.
Yes. It can provide memory to memory interface to user space standalone.
Best regards
Shengjiu Wang
>
> Best regards,
> Alexander
>
> > };
> >
> > /* pin conflict with PDM */
> > @@ -185,6 +239,27 @@ &lpi2c4 {
> > pinctrl-0 = <&pinctrl_lpi2c4>;
> > status = "okay";
> >
> > + wm8962: audio-codec at 1a {
> > + compatible = "wlf,wm8962";
> > + reg = <0x1a>;
> > + clocks = <&scmi_clk IMX952_CLK_SAI3>;
> > + AVDD-supply = <®_audio_pwr>;
> > + CPVDD-supply = <®_audio_pwr>;
> > + DBVDD-supply = <®_audio_pwr>;
> > + DCVDD-supply = <®_audio_pwr>;
> > + gpio-cfg = < 0x0000 /* 0:Default */
> > + 0x0000 /* 1:Default */
> > + 0x0000 /* 2:FN_DMICCLK */
> > + 0x0000 /* 3:Default */
> > + 0x0000 /* 4:FN_DMICCDAT */
> > + 0x0000 /* 5:Default */
> > + >;
> > + MICVDD-supply = <®_audio_pwr>;
> > + PLLVDD-supply = <®_audio_pwr>;
> > + SPKVDD1-supply = <®_audio_pwr>;
> > + SPKVDD2-supply = <®_audio_pwr>;
> > + };
> > +
> > i2c4_pcal6408: gpio at 21 {
> > compatible = "nxp,pcal6408";
> > reg = <0x21>;
> > @@ -312,6 +387,24 @@ &lpspi7 {
> > status = "okay";
> > };
> >
> > +&sai3 {
> > + assigned-clocks = <&scmi_clk IMX952_CLK_AUDIOPLL1_VCO>,
> > + <&scmi_clk IMX952_CLK_AUDIOPLL2_VCO>,
> > + <&scmi_clk IMX952_CLK_AUDIOPLL1>,
> > + <&scmi_clk IMX952_CLK_AUDIOPLL2>,
> > + <&scmi_clk IMX952_CLK_SAI3>;
> > + assigned-clock-parents = <0>, <0>, <0>, <0>,
> > + <&scmi_clk IMX952_CLK_AUDIOPLL1>;
> > + assigned-clock-rates = <3932160000>, <3612672000>,
> > + <393216000>, <361267200>, <12288000>;
> > + pinctrl-0 = <&pinctrl_sai3>;
> > + pinctrl-1 = <&pinctrl_sai3_sleep>;
> > + pinctrl-names = "default", "sleep";
> > + fsl,sai-amix-mode = "bypass";
> > + fsl,sai-mclk-direction-output;
> > + status = "okay";
> > +};
> > +
> > &scmi_misc {
> > nxp,ctrl-ids = <BRD_SM_CTRL_SD3_WAKE 1
> > BRD_SM_CTRL_M2E_WAKE 1
> > @@ -402,6 +495,12 @@ IMX952_PAD_GPIO_IO27__WAKEUPMIX_TOP_CAN2_RX 0x39e
> > >;
> > };
> >
> > + pinctrl_hp: hpgrp {
> > + fsl,pins = <
> > + IMX952_PAD_GPIO_IO11__WAKEUPMIX_TOP_GPIO2_IO_11 0x31e
> > + >;
> > + };
> > +
> > pinctrl_lpi2c2: lpi2c2grp {
> > fsl,pins = <
> > IMX952_PAD_I2C2_SCL__AONMIX_TOP_LPI2C2_SCL 0x40000b9e
> > @@ -476,6 +575,26 @@ IMX952_PAD_SD2_RESET_B__WAKEUPMIX_TOP_GPIO3_IO_7 0x31e
> > >;
> > };
> >
> > + pinctrl_sai3: sai3grp {
> > + fsl,pins = <
> > + IMX952_PAD_GPIO_IO17__WAKEUPMIX_TOP_SAI3_MCLK 0x31e
> > + IMX952_PAD_GPIO_IO16__WAKEUPMIX_TOP_AUDMIX_TDM_OUT_TXBCLK 0x31e
> > + IMX952_PAD_GPIO_IO26__WAKEUPMIX_TOP_AUDMIX_TDM_OUT_TXSYNC 0x31e
> > + IMX952_PAD_GPIO_IO20__WAKEUPMIX_TOP_SAI3_RX_DATA_0 0x31e
> > + IMX952_PAD_GPIO_IO21__WAKEUPMIX_TOP_AUDMIX_TDM_OUT_TXDATA 0x31e
> > + >;
> > + };
> > +
> > + pinctrl_sai3_sleep: sai3sleepgrp {
> > + fsl,pins = <
> > + IMX952_PAD_GPIO_IO17__WAKEUPMIX_TOP_GPIO2_IO_17 0x31e
> > + IMX952_PAD_GPIO_IO16__WAKEUPMIX_TOP_GPIO2_IO_16 0x31e
> > + IMX952_PAD_GPIO_IO26__WAKEUPMIX_TOP_GPIO2_IO_26 0x31e
> > + IMX952_PAD_GPIO_IO20__WAKEUPMIX_TOP_GPIO2_IO_20 0x31e
> > + IMX952_PAD_GPIO_IO21__WAKEUPMIX_TOP_GPIO2_IO_21 0x31e
> > + >;
> > + };
> > +
> > pinctrl_tpm3: tpm3grp {
> > fsl,pins = <
> > IMX952_PAD_GPIO_IO12__WAKEUPMIX_TOP_TPM3_CH2 0x51e
> >
>
>
> --
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> Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
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>
>
>
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