[PATCH] KVM: arm64: Skip interrupts in LRs during EOIcount replay

[Marc Zyngier]

On Sat, 07 Mar 2026 18:29:05 +0000,
Valentine Burley <valentine.burley at collabora.com> wrote:
> 
> Hi Marc,
> 
> Thanks a lot for your reply.
> 
> On Sat, 07 Mar 2026 17:33:08 +0100  Marc Zyngier <maz at kernel.org> wrote
>  > I can't reproduce it locally, but in a crap integration, where the GIC
>  > is clocked at a few dozen MHz, this is far more likely to happen. I
>  > should dig that Lazor out of the bin and put it back in the test rig.
>  > 
>  > In retrospect, it is obvious. I just couldn't see it until then. Many
>  > thanks for going the extra mile and pointing out the core issue.
> 
> Appreciate the clarification!
> 
> We also have a few Lazor boards in our CI, and the Trogdors are indeed
> legendary for hitting all kinds of edge cases.

Right. Time to have a look at SBoyd's u-boot patches from last year!

> 
> <snip>
> 
>  > Could you please give the hack below a go on your setup? It seems to
>  > work for me, but given that I never observed the issue the first
>  > place...
> 
> I've tested this on my sc7180 Trogdor setup, and it completely 
> resolves the issue. The Cuttlefish VM now boots reliably.
>
> Tested-by: Valentine Burley <valentine.burley at collabora.com>

Awesome. I have since tweaked the patch a tiny bit to keep the restart
pointer per CPU instead of per vcpu, as this doesn't live beyond the
load/put sequence. I'll post it formally for you to confirm that the
updated version is still correct.

Thanks,

	M.

-- 
Jazz isn't dead. It just smells funny.