i.MX8M Plus PCIe link regression

[Manivannan Sadhasivam]

On Tue, Mar 03, 2026 at 01:38:13PM +0100, Alexander Stein wrote:
> Hi,
> 
> these days I noticed that there is a PCIe link regression on my i.MX8MP
> platform (TQMa8MPxL) running next-20260227.
> I could bisect it back to commit 9c03e30e3ade3 ("PCI: imx6: Skip link up 
> workaround for newer platforms"). I always get the following errors:
> 
> imx6q-pcie 33800000.pcie: Link failed to come up. LTSSM: CFG_LINKWD_START
> imx6q-pcie 33800000.pcie: probe with driver imx6q-pcie failed with error -110
> 
> Connected is a Gen1 PCIe -> Ethernet adapter. Interestingly a Gen2 device is
> detected without issues.
> 
> Reverting 3c96a61dd2e098dda8dcac3dce3d38a3c87afbfc and
> b9a8d28ebbf118bb3eac953f4a37abbd341257ab "fixes" my platform, both Gen 1 and
> Gen 2 devices are detect. Commit 3c96a61dd2e098dda8dcac3dce3d38a3c87afbfc is only
> required for conflict free revert.
> 
> Here is a summary with outputs:
> Gen 1 device
> > 00:00.0 PCI bridge: Synopsys, Inc. DWC_usb3 / PCIe bridge (rev 01)
> > 01:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd.
> > RTL8111/8168/8211/8411 PCI Express Gigabit Ethernet Controller (rev 01)
> 
> Gen 2 device
> > 00:00.0 PCI bridge: Synopsys, Inc. DWC_usb3 / PCIe bridge (rev 01)
> > 01:00.0 SATA controller: Marvell Technology Group Ltd. 88SE9128 PCIe SATA 6
> > Gb/s RAID controller (rev 20)
> 
> output of "dmesg | grep imx6q-pcie". Common part for all tests:
> > imx6q-pcie 33800000.pcie: host bridge /soc at 0/pcie at 33800000 ranges:
> > imx6q-pcie 33800000.pcie:       IO 0x001ff80000..0x001ff8ffff ->
> > 0x0000000000
> > imx6q-pcie 33800000.pcie:      MEM 0x0018000000..0x001fefffff ->
> > 0x0018000000
> > imx6q-pcie 33800000.pcie: config reg[1] 0x1ff00000 == cpu 0x1ff00000
> > imx6q-pcie 33800000.pcie: iATU: unroll T, 4 ob, 4 ib, align 64K, limit 16G
> 
> next-20260227
> Gen 1
> > imx6q-pcie 33800000.pcie: Link failed to come up. LTSSM: CFG_LINKWD_START
> > imx6q-pcie 33800000.pcie: probe with driver imx6q-pcie failed with error -110
> 
> Gen 2
> > imx6q-pcie 33800000.pcie: PCIe Gen.2 x1 link up
> > imx6q-pcie 33800000.pcie: PCI host bridge to bus 0000:00
> 
> next-20260227 + reverts
> Gen 1
> > imx6q-pcie 33800000.pcie: PCIe Gen.1 x1 link up
> > imx6q-pcie 33800000.pcie: PCIe Gen.1 x1 link up
> > imx6q-pcie 33800000.pcie: PCI host bridge to bus 0000:00
> 
> Gen 2
> > imx6q-pcie 33800000.pcie: PCIe Gen.1 x1 link up
> > imx6q-pcie 33800000.pcie: PCIe Gen.2 x1 link up
> > imx6q-pcie 33800000.pcie: PCI host bridge to bus 0000:00
> 
> What can we do here? I'm wondering why Gen 2 trains correctly, while Gen 1
> doesn't.
> 

Thanks for the report and sorry for the breakage. Commit 9c03e30e3ade3, mentions
that the workaround is only needed for the i.MX6 platforms. So I'm not sure why
the patch breaks i.MX8M and that too only for Gen 1 speed.

Also, before 9c03e30e3ade3, LTSSM was always started in Gen 1, but as per your
finding, only Gen 1 devices fail to work. So the code till
imx_pcie_wait_for_speed_change() shouldn't have an impact. Maybe the issue is
due to skipping imx_pcie_wait_for_speed_change()?

Richard, thoughts?

- Mani

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