[PATCH v3 net-next 0/2] Add support for dual port USXGMII+SGMII

[Gokul Praveen]

This patch series enables dual port USXGMII and SGMII Ethernet mode
support on the TI J784S4 EVM platform using the CPSW9G Ethernet switch.

The CPSW9G instance supports both SGMII and USXGMII modes simultaneously
on MAC Ports 1 and 2, which connect to ENET Expansion 1 and ENET
Expansion 2 slots through the SERDES2 instance. The series includes:

Multilink SERDES configuration support added to the SERDES2 node by adding
the PLL1 refclk.

v2 <==> v1
===========
* Added modifications to the device tree bindings documentation.

v3 <=> v2
==========
* Added net-next suffix in the patch subject.
* Added a separate bindings patch and added appropriate subject
  format expected for Bindings patches.
* Updated the cover letter description

Gokul Praveen (2):
  arm64: dts: ti: Add PLL1 refclk to J784S4 SoC SERDES node
  dt-bindings: phy: cadence-torrent: Update property values to support 3
    clocks

 .../devicetree/bindings/phy/phy-cadence-torrent.yaml          | 4 ++--
 arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi                    | 3 ++-
 2 files changed, 4 insertions(+), 3 deletions(-)

-- 
2.34.1