[PATCH v5 06/14] arm64: dts: imx8mp-var-som-symphony: enable PCIe

Frank Li Frank.li at oss.nxp.com
Mon Jun 29 09:30:09 PDT 2026


On Mon, Jun 08, 2026 at 04:41:07PM +0200, Stefano Radaelli wrote:
> From: Stefano Radaelli <stefano.r at variscite.com>
>
> Add the PCIe reference clock and enable the PCIe controller and PHY on
> the Symphony carrier board.
>
> Describe the PERST# reset GPIO and configure the PHY to use an external
> reference clock input.
>
> Signed-off-by: Stefano Radaelli <stefano.r at variscite.com>
> ---
> v4->v5:
>  -
>
> v3->v4:
>  - Add pcie reset-gpios instead of deprecated one
>
> v2->v3:
>  -
>
> v1->v2:
>  - Adjust PCIe controller configuration
>
>  .../dts/freescale/imx8mp-var-som-symphony.dts  | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts b/arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts
> index fdac4ceb4c19..698f02fc39a5 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts
> @@ -48,6 +48,12 @@ led-0 {
>  		};
>  	};
>
> +	pcie0_refclk: pcie0-refclk {
> +		compatible = "fixed-clock";
> +		#clock-cells = <0>;
> +		clock-frequency = <100000000>;
> +	};
> +
>  	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
>  		compatible = "regulator-fixed";
>  		regulator-name = "VSD_3V3";
> @@ -146,6 +152,18 @@ rtc at 68 {
>  	};
>  };
>
> +&pcie {
> +	reset-gpios = <&pcal6408 1 GPIO_ACTIVE_LOW>;
> +	status = "okay";
> +};
> +
> +&pcie_phy {
> +	clocks = <&pcie0_refclk>;
> +	clock-names = "ref";

You have to provide all clocks, otherwise, whole clocks and clock-names will
by overwrite with one clock "ref".

suppose CHECK_DTBS should report warning about clocks items.

Frank

> +	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
> +	status = "okay";
> +};
> +
>  &snvs_pwrkey {
>  	status = "okay";
>  };
> --
> 2.47.3
>



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