chipidea: usbmisc_imx: i.MX93 support

[Stefan Wahren]

Hi,

during debugging USB OTG on our custom i.MX93 board, we noticed 
remarkable differences between the implementation of the 
chipidea/usbmisc_imx and the official NXP i.MX93 Reference Manual [1].

Is the USB OTG part including PHY of the i.MX93 officially supported in 
Linux Mainline?

According to imx91_93_common.dtsi the USB IP of the i.MX93 should be 
identical to i.MX8MM [2]

     usbmisc1: usbmisc at 4c100200 {

         compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc", 
"fsl,imx6q-usbmisc";

But looking at the PHY register definition and reset values in the NXP 
i.MX93 Reference Manual,

the registers are comparable to the i.MX95 [3] ones.

Could you please clarify which source is correct (Mainline DTS vs 
Reference Manual)?

Looking deeper at chipidea/usbmisc_imx shows the usage of the following 
register bits

#define MX7D_USB_OTG_PHY_CFG2_CHRG_CHRGSEL         BIT(0)

#define MX7D_USB_OTG_PHY_CFG2_CHRG_VDATDETENB0              BIT(1)

#define MX7D_USB_OTG_PHY_CFG2_CHRG_VDATSRCENB0              BIT(2)

#define MX7D_USB_OTG_PHY_CFG2_CHRG_DCDENB           BIT(3)

#define MX7D_USB_OTG_PHY_STATUS_LINE_STATE0              BIT(0)

#define MX7D_USB_OTG_PHY_STATUS_LINE_STATE1              BIT(1)

#define MX7D_USB_OTG_PHY_STATUS_CHRGDET                    BIT(29)

According to NXP i.MX93 & i.MX95 Reference Manual, these are bits reserved.

Is it correct that the chipidea/usbmisc_imx use these bits on i.MX93?

Best regards

[1] - https://www.nxp.com/docs/en/reference-manual/IMX93RM.pdf 
<https://www.nxp.com/docs/en/reference-manual/IMX93RM.pdf>

[2] - https://www.nxp.com/docs/en/reference-manual/IMX8MMRM.pdf 
<https://www.nxp.com/docs/en/reference-manual/IMX8MMRM.pdf>

[3] - https://www.nxp.com/docs/en/reference-manual/IMX95RM.pdf 
<https://www.nxp.com/docs/en/reference-manual/IMX95RM.pdf>