[PATCH] arm64: Avoid eager DVMSync reclaim batches with C1-Pro SME erratum

[Joshua Liu]

On Wed, Jun 10, 2026 at 11:37 AM Catalin Marinas <catalin.marinas at arm.com> wrote:
> Introduce the sme_active_cpus mask tracking which CPUs run in user-space
> with SME enabled and use it for batch flushing instead of accumulating
> the mm_cpumask() of the unmapped pages.
> [...]
> The dsb() in arch_tlbbatch_add_pending() -> sme_dvmsync_add_pending()
> did introduce a performance regression for kswapd. This patch restores
> the original behaviour with the barrier only issued when the TLB batch
> is flushed. The trade-off is that the IPIs are now sent to all CPUs
> running with SME enabled at EL0 even if the reclaimed pages do not
> belong to SME tasks. This is acceptable for current SME deployments.

Profiling shows this solution has robust performance for common
workloads and is the best among a few approaches we tested with Catalin,
so we are happy to go with this solution.

Some sidenotes: for certain edge cases we still observe performance
regression, specifically when a workload pegs multiple cores with SME
status threads.

Tested-by: Joshua Liu <josliu at google.com>