[PATCH RFC 1/3] cpu/hotplug: Introduce CONFIG_PARALLEL_SMT_PRIMARY_FIRST

[Jinjie Ruan]

On 6/18/2026 11:17 PM, Thomas Gleixner wrote:
> On Thu, Jun 11 2026 at 21:38, Jinjie Ruan wrote:
> 
>> During parallel CPU bringup, x86 requires primary SMT threads to boot
>> first to avoid siblings stopping during microcode updates. This constraint
>> is architecture-specific and unnecessary for other platforms
>> like arm64.
>>
>> Introduce CONFIG_PARALLEL_SMT_PRIMARY_FIRST to decouple this constraint.
>> Platforms requiring this temporal order (e.g., x86) can select it
>> in Kconfig. Other architectures (e.g., arm64) can leave it unselected
>> to entirely bypass the SMT branch via the preprocessor.
>>
>> Signed-off-by: Jinjie Ruan <ruanjinjie at huawei.com>
>> ---
>>  arch/Kconfig       | 4 ++++
>>  arch/mips/Kconfig  | 1 +
>>  arch/riscv/Kconfig | 1 +
>>  arch/x86/Kconfig   | 1 +
>>  kernel/cpu.c       | 6 +++++-
>>  5 files changed, 12 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/Kconfig b/arch/Kconfig
>> index e86880045158..0365d2df2659 100644
>> --- a/arch/Kconfig
>> +++ b/arch/Kconfig
>> @@ -102,6 +102,10 @@ config HOTPLUG_PARALLEL
>>  	bool
>>  	select HOTPLUG_SPLIT_STARTUP
>>  
>> +config PARALLEL_SMT_PRIMARY_FIRST
> 
> Proper namespaces are overrated, right?
> 
> All related options start with HOTPLUG_....

Sure, will update to `HOTPLUG_PARALLEL_SMT`		

> 
>> +	bool
>> +	depends on HOTPLUG_PARALLEL
>> +
>>  config GENERIC_IRQ_ENTRY
>>  	bool
>>  
>> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
>> index 4364f3dba688..84e11ac0cf71 100644
>> --- a/arch/mips/Kconfig
>> +++ b/arch/mips/Kconfig
>> @@ -642,6 +642,7 @@ config EYEQ
>>  	select MIPS_CPU_SCACHE
>>  	select MIPS_GIC
>>  	select MIPS_L1_CACHE_SHIFT_7
>> +	select PARALLEL_SMT_PRIMARY_FIRST if HOTPLUG_PARALLEL
>>  	select PCI_DRIVERS_GENERIC
>>  	select SMP_UP if SMP
>>  	select SWAP_IO_SPACE
>> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
>> index d235396c4514..0cc49aecc841 100644
>> --- a/arch/riscv/Kconfig
>> +++ b/arch/riscv/Kconfig
>> @@ -210,6 +210,7 @@ config RISCV
>>  	select OF
>>  	select OF_EARLY_FLATTREE
>>  	select OF_IRQ
>> +	select PARALLEL_SMT_PRIMARY_FIRST if HOTPLUG_PARALLEL
> 
> Why does RISCV need this? It does not select HOTPLUG_SMT to begin with.

You are right, this was initially done to keep in line with the legacy
implementation.

> 
>> +#ifdef CONFIG_PARALLEL_SMT_PRIMARY_FIRST
>>  #ifdef CONFIG_HOTPLUG_SMT
> 
> More #ifdeffery is better, right?
> 
>>  static inline bool cpuhp_smt_aware(void)
>>  {
>> @@ -1811,7 +1812,8 @@ static inline const struct cpumask *cpuhp_get_primary_thread_mask(void)
>>  {
>>  	return cpu_none_mask;
>>  }
>> -#endif
>> +#endif /* CONFIG_HOTPLUG_SMT */
>> +#endif /* CONFIG_PARALLEL_SMT_PRIMARY_FIRST */
>>  
>>  bool __weak arch_cpuhp_init_parallel_bringup(void)
>>  {
>> @@ -1837,6 +1839,7 @@ static bool __init cpuhp_bringup_cpus_parallel(unsigned int ncpus)
>>  	if (!__cpuhp_parallel_bringup)
>>  		return false;
>>  
>> +#ifdef CONFIG_PARALLEL_SMT_PRIMARY_FIRST
> 
> Seriously?
> 
>>  	if (cpuhp_smt_aware()) {
>>  		const struct cpumask *pmask = cpuhp_get_primary_thread_mask();
>>  		static struct cpumask tmp_mask __initdata;
>> @@ -1857,6 +1860,7 @@ static bool __init cpuhp_bringup_cpus_parallel(unsigned int ncpus)
>>  		cpumask_andnot(&tmp_mask, mask, pmask);
>>  		mask = &tmp_mask;
>>  	}
>> +#endif /* CONFIG_PARALLEL_SMT_PRIMARY_FIRST */
> 
> Something simple like the uncompiled below should just work, no?

Yes, everything looks good, except for a minor compilation issue.

> 
> ---
> --- a/arch/Kconfig
> +++ b/arch/Kconfig
> @@ -102,6 +102,10 @@ config HOTPLUG_PARALLEL
>  	bool
>  	select HOTPLUG_SPLIT_STARTUP
>  
> +config HOTPLUG_PARALLEL_SMT
> +	bool
> +	select HOTPLUG_PARALLEL
> +

+config HOTPLUG_PARALLEL_SMT
+       bool
+       select HOTPLUG_PARALLEL
+       select HOTPLUG_SMT

We should select HOTPLUG_SMT here to prevent the compilation issue where
HOTPLUG_PARALLEL_SMT is enabled without HOTPLUG_SMT.

>  config GENERIC_IRQ_ENTRY
>  	bool
>  
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -657,7 +657,7 @@ config EYEQ
>  	select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>  	select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>  	select USE_OF
> -	select HOTPLUG_PARALLEL if HOTPLUG_CPU
> +	select HOTPLUG_PARALLEL_SMT if HOTPLUG_CPU
>  	help
>  	  Select this to build a kernel supporting EyeQ SoC from Mobileye.
>  
> @@ -2295,7 +2295,6 @@ config MIPS_CPS
>  	select MIPS_CM
>  	select MIPS_CPS_PM if HOTPLUG_CPU
>  	select SMP
> -	select HOTPLUG_SMT if HOTPLUG_PARALLEL
>  	select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
>  	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>  	select SYS_SUPPORTS_HOTPLUG_CPU
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -304,7 +304,7 @@ config X86
>  	select HAVE_USER_RETURN_NOTIFIER
>  	select HAVE_GENERIC_VDSO
>  	select VDSO_GETRANDOM			if X86_64
> -	select HOTPLUG_PARALLEL			if SMP && X86_64
> +	select HOTPLUG_PARALLEL_SMT		if SMP && X86_64
>  	select HOTPLUG_SMT			if SMP
>  	select HOTPLUG_SPLIT_STARTUP		if SMP && X86_32
>  	select IRQ_FORCED_THREADING
> --- a/kernel/cpu.c
> +++ b/kernel/cpu.c
> @@ -1792,7 +1792,7 @@ static int __init parallel_bringup_parse
>  }
>  early_param("cpuhp.parallel", parallel_bringup_parse_param);
>  
> -#ifdef CONFIG_HOTPLUG_SMT
> +#ifdef CONFIG_HOTPLUG_PARALLEL_SMT
>  static inline bool cpuhp_smt_aware(void)
>  {
>  	return cpu_smt_max_threads > 1;
>