[PATCH v2 3/4] irqchip/gic-v3: Add Renesas R-Car Gen4 erratum workaround

[Marek Vasut]

On 6/21/26 12:59 PM, Thomas Gleixner wrote:
> On Fri, Jun 19 2026 at 00:02, Marek Vasut wrote:
>> Renesas R-Car S4/V4H/V4M GIC600 integration has address width for AXI
>> or APB interface configured to 32 bit, it can therefore access only
>> the first 4 GiB of physical address space. This information comes from
>> R-Car V4H Interface Specification sheet, there is currently no technical
>> update number assigned to this limitation. Further input from hardware
>> engineer indicates that this limitation also applies to R-Car S4 and V4M.
>> Name the limitation GEN4GICITS1, and add a driver quirk to mitigate this
>> limitation.
>>
>> The quirk is keyed on the combination of the GIC implementation
>> and the platform identification in the device tree.
>>
>> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh at renesas.com>
>> Signed-off-by: Marek Vasut <marek.vasut+renesas at mailbox.org>
> 
> This SOB chain is broken.

Broken ? I don't understand , could you please elaborate ?

Should I sort this alphabetically or is that something else ?

Thank you for your help !