[PATCH v2 1/1] reset: imx7: Correct polarity of MIPI CSI resets on i.MX8MQ

[Philipp Zabel]

On Fr, 2026-04-17 at 17:28 +0800, Robby Cai wrote:
> On Fri, Apr 17, 2026 at 10:47:48AM +0200, Philipp Zabel wrote:
> > On Fr, 2026-04-17 at 16:08 +0800, Robby Cai wrote:
> > > On i.MX8MQ, the MIPI CSI reset lines are active-low and not self-clearing.
> > > Writing '0' asserts reset and it remains asserted until explicitly
> > > deasserted by software.
> > > 
> > > This driver previously treated the MIPI CSI reset signals as active-high,
> > > which led to incorrect reset assert/deassert sequencing. This issue was
> > > exposed by commit 6d79bb8fd2aa ("media: imx8mq-mipi-csi2: Explicitly
> > > release reset").
> > 
> > If this patch is backported without 6d79bb8fd2aa, or the other way
> > around, will that break MIPI CSI-2 on older kernels? That would warrant
> > a Cc: stable tag.
> > 
> 
> Yes, will break.
> These two patches should be backported as a pair to ensure correct behavior.

Reviewed-by: Philipp Zabel <p.zabel at pengutronix.de>

Can you please resend with

Cc: <stable at vger.kernel.org> # 6d79bb8fd2aa: media: imx8mq-mipi-csi2: Explicitly release reset

regards
Philipp