[PATCH 1/3] PCI: rcar-gen4: Configure AXIINTC if iMSI-RX not used

Marek Vasut marek.vasut at mailbox.org
Wed Jun 17 20:21:25 PDT 2026


On 6/17/26 12:33 PM, Manivannan Sadhasivam wrote:

Hello Manivannan,

[...]

>> +/* INTC address */
>> +#define AXIINTCADDR		0x0a00
>> +/* GITS GIC ITS translation register */
>> +#define AXIINTCADDR_VAL		0xf1050000
> 
> As Marc pointed out, this address should be fetched from DT, not hardcoded in
> the driver.

I will reply to Marc when I have this ready for V2.

>> +
>> +/* INTC control & mask */
>> +#define AXIINTCCONT		0x0a04
>> +#define INTC_EN			BIT(31)
>> +#define INTC_MASK		GENMASK(11, 2)
>> +
>>   /* PCIe Power Management Control */
>>   #define PCIEPWRMNGCTRL		0x0070
>>   #define APP_CLK_REQ_N		BIT(11)
>> @@ -305,6 +319,39 @@ static struct rcar_gen4_pcie *rcar_gen4_pcie_alloc(struct platform_device *pdev)
>>   	return rcar;
>>   }
>>   
>> +static void rcar_gen4_pcie_host_msi_init(struct dw_pcie_rp *pp)
>> +{
>> +	struct dw_pcie *dw = to_dw_pcie_from_pp(pp);
>> +	struct rcar_gen4_pcie *rcar = to_rcar_gen4_pcie(dw);
>> +	u32 val;
>> +
>> +	/* Make sure MSICAP0 MSIE is configured. */
>> +	val = dw_pcie_readl_dbi(dw, MSICAP0);
>> +	if (pci_msi_enabled())
>> +		val |= MSICAP0_MSIE;
>> +	else
>> +		val &= ~MSICAP0_MSIE;
>> +	dw_pcie_writel_dbi(dw, MSICAP0, val);
>> +
>> +	if (!pci_msi_enabled() || pp->use_imsi_rx) {
> 
> If MSI is not enabled, then what's the point in clearing these registers (also
> above)? I see it as a redundant code. Is there a necessity to clear them?
AXIINTCCONT INTC_EN should not be set if MSI is disabled, this code 
makes sure it is not set, even if it might have been left set e.g. by 
prior stage. So no, this is not redundant code, this makes sure the 
controller is correctly configured.



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