[PATCH] PCI: meson: Fix PERST# timing by asserting reset before LTSSM enable
neil.armstrong at linaro.org
neil.armstrong at linaro.org
Mon Jun 15 23:06:02 PDT 2026
On 6/15/26 12:34, Ronald Claveau wrote:
> On 6/14/26 3:56 AM, Gowtham Kudupudi wrote:
>> On warm reboot, the PCIe controller's LTSSM starts link training
>> immediately if PERST# is already deasserted from the previous boot.
>> The driver then pulses PERST# for only 500us, which is too short to
>> properly reset the endpoint device that has already started training.
>>
>> Fix by moving the PERST# assert/deassert pulse BEFORE enabling LTSSM,
>> so the endpoint gets a clean reset cycle before link training begins.
>>
>> This was found on Amlogic G12B (A311D) with NVMe on an M.2 slot.
>> Cold boot worked because POR held PERST# low; warm reboot did not.
>> The fix was confirmed on a Banana Pi CM4 with Waveshare IO base board.
>>
>> Signed-off-by: Gowtham Kudupudi <gowtham at ferryfair.com>
>> ---
>> drivers/pci/controller/dwc/pci-meson.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/pci/controller/dwc/pci-meson.c b/drivers/pci/controller/dwc/pci-meson.c
>> index 5f8e2f4b3c12..3a7e9f1d5b8c 100644
>> --- a/drivers/pci/controller/dwc/pci-meson.c
>> +++ b/drivers/pci/controller/dwc/pci-meson.c
>> @@ -310,8 +310,8 @@ static int meson_pcie_start_link(struct dw_pcie *pci)
>> {
>> struct meson_pcie *mp = to_meson_pcie(pci);
>>
>> + meson_pcie_assert_reset(mp);
>> meson_pcie_ltssm_enable(mp);
>> - meson_pcie_assert_reset(mp);
I think this change is valid, other controllers resets PERST
in the host init callback, so either this or move to the
init callback.
Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>
>>
>> return 0;
>> }
>
> Hi Gowtham,
>
> I have a patch [1] that I haven't submitted yet.
> This might be related to your issue, what do you think ?
Ronald, This fix is valid, it's definitely better to probe the
driver with PERST asserted, please send it.
Neil
>
> [1] https://github.com/rclaveau-tech/linux-khadas/commit/bee0a02d9756
>
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