[PATCH RFC 1/2] dt-bindings: pinctl: amlogic,pinctrl-a4: Add gpio irq property

Xianwei Zhao xianwei.zhao at amlogic.com
Sun Jun 14 19:47:12 PDT 2026


Hi Conor,
    Thanks for your review.

On 2026/6/12 01:39, Conor Dooley wrote:
> Subject:
> Re: [PATCH RFC 1/2] dt-bindings: pinctl: amlogic,pinctrl-a4: Add gpio 
> irq property
> From:
> Conor Dooley <conor at kernel.org>
> Date:
> 2026/6/12 01:39
> 
> To:
> xianwei.zhao at amlogic.com
> CC:
> Linus Walleij <linusw at kernel.org>, Rob Herring <robh at kernel.org>, 
> Krzysztof Kozlowski <krzk+dt at kernel.org>, Conor Dooley 
> <conor+dt at kernel.org>, Neil Armstrong <neil.armstrong at linaro.org>, Kevin 
> Hilman <khilman at baylibre.com>, Jerome Brunet <jbrunet at baylibre.com>, 
> Martin Blumenstingl <martin.blumenstingl at googlemail.com>, 
> linux-amlogic at lists.infradead.org, linux-gpio at vger.kernel.org, 
> devicetree at vger.kernel.org, linux-kernel at vger.kernel.org, 
> linux-arm-kernel at lists.infradead.org
> 
> 
> 
> On Thu, Jun 11, 2026 at 07:54:33AM +0000, Xianwei Zhao via B4 Relay wrote:
>> From: Xianwei Zhao<xianwei.zhao at amlogic.com>
>>
>> Add the hw-irq property for each GPIO bank and enable interrupt-parent
>> for pinctrl so that gpiod_to_irq() can translate GPIO lines to IRQs.
> Uhhhhh, what? Why can't you just use the normal interrupts property?
> 

The interrupt cannot be used directly because the GPIO bank only 
provides an IRQ base, which does not have a one-to-one mapping with the 
actual hardware interrupts.

On Amlogic SoCs, GPIO interrupts are handled through a mux. Multiple 
GPIO pins are mapped to a limited number of real interrupt sources. The 
implementation can be found here:

https://github.com/torvalds/linux/blob/master/drivers/irqchip/irq-meson-gpio.c

To use a GPIO interrupt, an unused hardware interrupt must first be 
allocated, and then the corresponding mux register must be configured. 
This allocation and mapping are already implemented in the existing driver.

In that driver, the mapping is performed dynamically rather than simply 
calculating:

irq = irq_start + gpio_offset

If the interrupt is used directly, only the GPIO index can be obtained. 
The real interrupt number cannot be derived by simply adding an offset, 
because the hardware interrupt must be allocated first. Pre-allocating 
all interrupts during initialization would prevent later GPIOs from 
obtaining available interrupt sources.

Perhaps other names would be more appropriate here, such as "irq_start".

>> Signed-off-by: Xianwei Zhao<xianwei.zhao at amlogic.com>
>> ---
>>   Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml | 5 +++++
>>   1 file changed, 5 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml
>> index b69db1b95345..65ec9121300e 100644
>> --- a/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml
>> +++ b/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml
>> @@ -37,6 +37,8 @@ properties:
>>   
>>     ranges: true
>>   
>> +  interrupt-parent: true
>> +
>>   patternProperties:
>>     "^gpio@[0-9a-f]+$":
>>       type: object
>> @@ -65,6 +67,9 @@ patternProperties:
>>         gpio-ranges:
>>           maxItems: 1
>>   
>> +      hw-irq:
>> +        $ref: /schemas/types.yaml#/definitions/uint32
>> +
>>       required:
>>         - reg
>>         - reg-names
>>
>> -- 
>> 2.52.0



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