[PATCH v3 1/2] dt-bindings: spi: nuvoton,ma35d1-qspi: Add Nuvoton MA35D1 QSPI

[Conor Dooley]

On Fri, Jun 12, 2026 at 08:33:01AM +0800, Chi-Wen Weng wrote:
> Hi Conor,
> 
> Thanks for the review.
> 
> I will add a default value for num-cs in v4:
> 
>   num-cs:
>     maximum: 2
>     default: 2
> 
> The controller has two native chip selects and the driver currently uses
> that hardware default.

The driver should handle the property and fall back to the default.
It's not complex to support, so surely there's no reason not to?

Cheers,
Conor.

> 
> Best regards,
> Chi-Wen
> 
> Conor Dooley 於 2026/6/12 上午 01:34 寫道:
> > On Thu, Jun 11, 2026 at 05:12:45PM +0800, Chi-Wen Weng wrote:
> > > From: Chi-Wen Weng <cwweng at nuvoton.com>
> > > 
> > > Add a devicetree binding for the Quad SPI controller found in
> > > Nuvoton MA35D1 SoCs.
> > > 
> > > The controller supports SPI memory devices such as SPI NOR and SPI NAND
> > > flashes. It has one register range, one clock input and one reset line,
> > > and supports up to two chip selects.
> > > 
> > > Signed-off-by: Chi-Wen Weng <cwweng at nuvoton.com>
> > > ---
> > >   .../bindings/spi/nuvoton,ma35d1-qspi.yaml     | 62 +++++++++++++++++++
> > >   1 file changed, 62 insertions(+)
> > >   create mode 100644 Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml
> > > 
> > > diff --git a/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml b/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml
> > > new file mode 100644
> > > index 000000000000..d3b36e612eb0
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml
> > > @@ -0,0 +1,62 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/spi/nuvoton,ma35d1-qspi.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Nuvoton MA35D1 Quad SPI Controller
> > > +
> > > +maintainers:
> > > +  - Chi-Wen Weng <cwweng at nuvoton.com>
> > > +
> > > +allOf:
> > > +  - $ref: /schemas/spi/spi-controller.yaml#
> > > +
> > > +properties:
> > > +  compatible:
> > > +    const: nuvoton,ma35d1-qspi
> > > +
> > > +  reg:
> > > +    maxItems: 1
> > > +
> > > +  interrupts:
> > > +    maxItems: 1
> > > +
> > > +  clocks:
> > > +    maxItems: 1
> > > +
> > > +  resets:
> > > +    maxItems: 1
> > > +
> > > +  num-cs:
> > > +    maximum: 2
> > Missing a default of 2, unless you make the property required.
> > FWIW, your driver doesn't appear to read this value.
> > 
> > pw-bot: changes-requested
> > 
> > Cheers,
> > Conor.
> > 
> > > +
> > > +required:
> > > +  - compatible
> > > +  - reg
> > > +  - clocks
> > > +  - resets
> > > +
> > > +unevaluatedProperties: false
> > > +
> > > +examples:
> > > +  - |
> > > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> > > +    #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
> > > +    #include <dt-bindings/reset/nuvoton,ma35d1-reset.h>
> > > +
> > > +    soc {
> > > +        #address-cells = <2>;
> > > +        #size-cells = <2>;
> > > +
> > > +        spi at 40680000 {
> > > +            compatible = "nuvoton,ma35d1-qspi";
> > > +            reg = <0 0x40680000 0 0x100>;
> > > +            interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
> > > +            clocks = <&clk QSPI0_GATE>;
> > > +            resets = <&sys MA35D1_RESET_QSPI0>;
> > > +            #address-cells = <1>;
> > > +            #size-cells = <0>;
> > > +        };
> > > +    };
> > > +
> > > -- 
> > > 2.25.1
> > > 
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