[PATCH v2 0/2] arm64: dts: Drop CPU masks from GICv3 PPI interrupts

[Geert Uytterhoeven]

	Hi all,

Unlike older GIC variants, the GICv3 DT bindings do not support
specifying a CPU mask in PPI interrupt specifiers.  Hence this patch
series drop all such masks where they are still present.

Changes compared to v1:
  - Drop applied patches,
  - Rebase on top of commit d0298724f901d45c ("arm64: dts: exynos: Add
    EL2 virtual timer interrupt") in soc/for-next.

This has been compile-tested only.  But note that all such masks were
removed before from Renesas SoCs in commit 8b6a006c914aac17 ("arm64:
dts: renesas: Drop specifying the GIC_CPU_MASK_SIMPLE() for GICv3
systems")).

Thanks for your comments!

[1] "[PATCH 0/7] arm64: dts: Drop CPU masks from GICv3 PPI interrupts"
    https://lore.kernel.org/cover.1772643434.git.geert+renesas@glider.be

Geert Uytterhoeven (2):
  arm64: dts: exynos: gs101: Drop CPU masks from GICv3 PPI interrupts
  arm64: dts: tegra: Drop CPU masks from GICv3 PPI interrupts

 arch/arm64/boot/dts/exynos/google/gs101.dtsi | 10 +++++-----
 arch/arm64/boot/dts/nvidia/tegra234.dtsi     | 10 +++++-----
 2 files changed, 10 insertions(+), 10 deletions(-)

-- 
2.43.0

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds