[PATCH v1 13/26] s390: Introduce read/write ARM sysreg instructions

Steffen Eiden seiden at linux.ibm.com
Wed Jun 10 01:30:54 PDT 2026


On Tue, Jun 09, 2026 at 05:04:10PM +0200, Janosch Frank wrote:
> On 5/29/26 17:55, Steffen Eiden wrote:
> > Introduce Extract Arm System Register and Store Arm System Register to
> > enable s390 hosts to read and write system registers for arm64 guests.
> > The new instructions use the new RIE_H instruction format. Add assembler
> > macros to create instructions in RIE_H format manually. Add Support for
> > disassembling the new instructions.
> > 
> > Co-developed-by: Andreas Grapentin <gra at linux.ibm.com>
> > Signed-off-by: Andreas Grapentin <gra at linux.ibm.com>
> > Signed-off-by: Steffen Eiden <seiden at linux.ibm.com>
> > ---
> >   arch/s390/include/asm/sae-asm.h | 48 +++++++++++++++++++++++++++
> >   arch/s390/include/asm/sae.h     | 58 +++++++++++++++++++++++++++++++++
> >   arch/s390/kernel/dis.c          |  1 +
> >   arch/s390/tools/opcodes.txt     |  2 ++
> >   4 files changed, 109 insertions(+)
> >   create mode 100644 arch/s390/include/asm/sae-asm.h
> > 


...

> > diff --git a/arch/s390/include/asm/sae.h b/arch/s390/include/asm/sae.h
> > index fe010a1a7729..1d9a16b91b23 100644
> > --- a/arch/s390/include/asm/sae.h
> > +++ b/arch/s390/include/asm/sae.h
> > @@ -4,6 +4,7 @@
> >   #include "linux/linkage.h"
> >   #include <linux/types.h>
> > +#include <asm/sae-asm.h>
> >   /* defined in arch/s390/kernel/entry.S */
> >   asmlinkage int __sae64a(phys_addr_t sae_block_phys);
> > @@ -12,6 +13,12 @@ asmlinkage int __sae64a(phys_addr_t sae_block_phys);
> >   #include <linux/io.h>
> >   #include <asm/kvm_host_arm64_types.h>
> > +asm(".include \"asm/sae-asm.h\"\n");
> > +
> > +#define _SAE_ASR_REG_SHIFT	5
> > +#define SASR_FLAG_INITIALIZED  0x8
> > +#define EASR_FLAG_SA           0x8
> 
> s/SA/SAVE_AREA/ or SAVEAREA
> 
> I think both might fit.

yes, might be a good idea.

> 
> > +
> >   /**
> >    * __sae64a() - Start Arm Execution
> >    */
> > @@ -20,6 +27,57 @@ static inline void sae64a(struct kvm_sae_block *sae_block)
> >   	__sae64a(virt_to_phys(sae_block));
> >   }
> > +/**
> > + * sasr() - Set Arm System Register
> > + * @arm_reg: ARM system register identifier; compile-time constant
> > + * @val: Value to set
> > + * @save_area: Pointer to SAE save area
> > + * @flags: Operation flags; compile-time constant
> > + *
> > + * Sets an ARM system register value.
> > + */
> > +static __always_inline void sasr(unsigned int arm_reg, u64 val,
> > +				 struct kvm_sae_save_area *save_area,
> > +				 u64 flags)
> 
> m4 is 4 bits in length, any reason why we use a u64 here?
> Same for easr.
> 

No real reason beside my preference of using u64 by default.

Do you want me to change it to u8?

	Steffen



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