[PATCH v2 2/2] spi: ma35d1-qspi: Add Nuvoton MA35D1 QSPI controller support

[Chi-Wen Weng]

Hi Mark,

Thanks for the review.

I will add mem_caps in v3 and set per_op_freq for the spi-mem path.

I will keep the direct CS polarity handling for now, and also add
SPI_CS_HIGH to mode_bits. I understand that moving this handling into
the core would be a separate issue.

Best regards,
Chi-Wen

Mark Brown 於 2026/6/8 下午 06:53 寫道:
> On Mon, Jun 08, 2026 at 10:50:09AM +0800, Chi-Wen Weng wrote:
>> Add SPI controller driver support for the Nuvoton MA35D1 Quad SPI
>> controller.
>> +static void nuvoton_qspi_mem_set_cs(struct spi_device *spi, bool enable)
>> +{
>> +	struct nuvoton_qspi *qspi = spi_controller_get_devdata(spi->controller);
>> +	bool assert = enable;
>> +
>> +	if (spi->mode & SPI_CS_HIGH)
>> +		assert = !assert;
> Hrm, we should have the core deal with this.  Separate issue though.
>
>> +	ctlr->num_chipselect = NUVOTON_QSPI_DEFAULT_NUM_CS;
>> +	ctlr->mem_ops = &nuvoton_qspi_mem_ops;
> We don't specify mem_caps, I'm vaugely surprised nothing trips over that
> when testing.