[PATCH 1/5] drm/rockchip: vop2: Fix wrong wait target in layer cfg done check
Andy Yan
andy.yan at rock-chips.com
Mon Jun 1 03:44:38 PDT 2026
Hello,
On 5/5/26 02:23, Cristian Ciocaltea wrote:
> rk3568_vop2_setup_layer_mixer() waits for the previous Video Port (VP)
> layer configuration to take effect before writing a new one to the
> shared RK3568_OVL_LAYER_SEL shadow register. However, it passes
> vop2->old_layer_sel to rk3568_vop2_wait_for_layer_cfg_done() as the
> expected value, which at that point already contains the new VP layer.
>
> This causes the wait to poll for a value that has not been written to
> the shadow register yet, resulting in spurious timeouts when two
> non-blocking atomic commits race:
>
> rockchip-drm display-subsystem: [drm] *ERROR* wait layer cfg done timeout [...]
>
> Pass the local old_layer_sel instead, which still holds the value
> captured from vop2->old_layer_sel before it was overwritten, i.e. the
> previous VP target that the hardware is expected to latch.
>
> Fixes: 3e89a8c68354 ("drm/rockchip: vop2: Fix the update of LAYER/PORT select registers when there are multi display output on rk3588/rk3568")
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea at collabora.com>
Reviewed-by: Andy Yan <andy.yan at rock-chips.com>
> ---
> drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
> index 02a788a4dfdd..edca0fb16e08 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
> @@ -2307,7 +2307,7 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)
> * Changes of other VPs' overlays have not taken effect
> */
> if (cfg_done)
> - rk3568_vop2_wait_for_layer_cfg_done(vop2, vop2->old_layer_sel);
> + rk3568_vop2_wait_for_layer_cfg_done(vop2, old_layer_sel);
> }
>
> vop2_writel(vop2, RK3568_OVL_LAYER_SEL, layer_sel);
>
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