[PATCH v2] arm64: errata: Add NXP iMX8QM workaround for A53 cache coherency issue

[Marc Zyngier]

On Thu, 30 Jul 2026 14:53:02 +0100,
"Peng Fan (OSS)" <peng.fan at oss.nxp.com> wrote:
> 
> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
> index 9a6c72a18672..734ccd7ec056 100644
> --- a/arch/arm64/kvm/arm.c
> +++ b/arch/arm64/kvm/arm.c
> @@ -3032,6 +3032,11 @@ static __init int kvm_arm_init(void)
>  
>  	in_hyp_mode = is_kernel_in_hyp_mode();
>  
> +	if (cpus_have_final_cap(ARM64_WORKAROUND_NXP_ERR050104)) {
> +		kvm_info("KVM not supported on NXP iMX8QM (ERR050104)\n");
> +		return -ENODEV;
> +	}
> +
>  	if (cpus_have_final_cap(ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE) ||
>  	    cpus_have_final_cap(ARM64_WORKAROUND_1508412))
>  		kvm_info("Guests without required CPU erratum workarounds can deadlock system!\n" \

I really dislike this sort of hacks in the KVM code.

Instead, please find a way to set 'kvm_mode' to KVM_MODE_NONE from
your erratum handler, and KVM will gracefully disable itself, as if
that was passed on the command line.

It shouldn't be too hard to do.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.