[RFC PATCH 04/13] arm64: percpu: Factor out percpu offset asm

[Jinjie Ruan]

在 2026/7/28 20:38, Mark Rutland 写道:
> Depending on whether the kernel runs at EL1 or EL2, the percpu offset is
> stored in either TPIDR_EL1 or TPIDR_EL2, and __kern_my_cpu_offset() uses
> an ALTERNATIVE() sequence to read the relevant TPIDR_ELx.
> 
> In subsequent patches we'll need to read the percpu offset in other
> assembly sequences. Factor the ALTERNATIVE sequence out of
> __kern_my_cpu_offset() into a new __KERN_ASM_CPU_OFFSET() macro so that
> we can share the code sequence.

Reviewed-by: Jinjie Ruan <ruanjinjie at huawei.com>

> 
> There should be no functional change as a result of this patch.
> 
> Signed-off-by: Mark Rutland <mark.rutland at arm.com>
> Cc: Ada Couprie Diaz <ada.coupriediaz at arm.com>
> Cc: Ard Biesheuvel <ardb at kernel.org>
> Cc: Catalin Marinas <catalin.marinas at arm.com>
> Cc: Jinjie Ruan <ruanjinjie at huawei.com>
> Cc: Marc Zyngier <maz at kernel.org>
> Cc: Peter Zijlstra <peterz at infradead.org>
> Cc: Vladimir Murzin <vladimir.murzin at arm.com>
> Cc: Will Deacon <will at kernel.org>
> Cc: Yang Shi <yang at os.amperecomputing.com>
> ---
>  arch/arm64/include/asm/percpu.h | 15 ++++++++++-----
>  1 file changed, 10 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/percpu.h b/arch/arm64/include/asm/percpu.h
> index b57b2bb009677..98823c97d534c 100644
> --- a/arch/arm64/include/asm/percpu.h
> +++ b/arch/arm64/include/asm/percpu.h
> @@ -29,6 +29,11 @@ static inline unsigned long __hyp_my_cpu_offset(void)
>  	return read_sysreg(tpidr_el2);
>  }
>  
> +#define __KERN_ASM_CPU_OFFSET(dst)					\
> +	ALTERNATIVE("mrs " dst ", tpidr_el1",				\
> +		    "mrs " dst ", tpidr_el2",				\
> +		       ARM64_HAS_VIRT_HOST_EXTN)
> +
>  static inline unsigned long __kern_my_cpu_offset(void)
>  {
>  	unsigned long off;
> @@ -37,11 +42,11 @@ static inline unsigned long __kern_my_cpu_offset(void)
>  	 * We want to allow caching the value, so avoid using volatile and
>  	 * instead use a fake stack read to hazard against barrier().
>  	 */
> -	asm(ALTERNATIVE("mrs %0, tpidr_el1",
> -			"mrs %0, tpidr_el2",
> -			ARM64_HAS_VIRT_HOST_EXTN)
> -		: "=r" (off) :
> -		"Q" (*(const unsigned long *)current_stack_pointer));
> +	asm(
> +	__KERN_ASM_CPU_OFFSET("%0")
> +	: "=r" (off)
> +	: "Q" (*(const unsigned long *)current_stack_pointer)
> +	);
>  
>  	return off;
>  }