[PATCH v2 2/2] iommu/arm-smmu-v3: Add HAFT support for SVA

Jason Gunthorpe jgg at nvidia.com
Sat Jul 25 07:27:59 PDT 2026


On Thu, Jul 23, 2026 at 03:19:44PM +0100, Robin Murphy wrote:
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
> @@ -102,6 +102,8 @@ void arm_smmu_make_sva_cd(struct arm_smmu_cd *target,
>  			target->data[0] |= cpu_to_le64(CTXDESC_CD_0_TCR_HA);
>  		if (master->smmu->features & ARM_SMMU_FEAT_HD)
>  			target->data[0] |= cpu_to_le64(CTXDESC_CD_0_TCR_HD);
> +		if (master->smmu->features & ARM_SMMU_FEAT_HAFT && system_supports_haft())
> +			target->data[1] |= cpu_to_le64(CTXDESC_CD_1_HAFT);
>  	} else {
>  		target->data[0] |= cpu_to_le64(CTXDESC_CD_0_TCR_EPD0);

Based on the Sashiko remark and your note you should lift all the
HA/HD/HAFT bits outside this if (mm) block.

AFAICT it is fine for HA/HD/HAFT to be set with EPD0, the HW won't
process any PTEs so they won't have any effect.

Since this avoids the BAD_CD inconsistency you pointed at and also avoids
changing word 1 it should avoid the problematic V=0 transition.

Jason



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