[PATCH] iommu/arm-smmu-v3: Add HAFT support for SVA

[Robin Murphy]

On 24/07/2026 4:25 pm, Jason Gunthorpe wrote:
> On Wed, Jul 22, 2026 at 11:20:48PM +0100, Will Deacon wrote:
> 
>>> We might block traffic in the process of _explicitly blocking traffic_!?
>>> Whoop-de-do, surely?
>>
>> Hmm. I have very vague memories that there were some virtualisation (?)
>> cases where Jason and Nicolin cared about the type of event that would
>> be generated by concurrent DMA (e.g. bad CD vs translation fault) but
>> maybe I'm misremembering.
> 
> Yeah, it is actually important for that special SVA mm drop/release
> case. We need to write a CD that blocks walking but always generates
> translation fault.
> 
> I'm away from my computer right now, but if sashiko is saying that the
> SVA flow that uses EPD generates a racy bad CD then that is a bug that
> needs to be fixed. Possibly by ignoring HAFT in the used calculation
> for the EPD cases.

Again, HAFT has nothing whatsoever to do with EPD0. Guess what happens 
if we were to ignore it as nonsensically suggested? Oh look, C_BAD_CD 
again, since a valid CD with HA=0 and HAFT=1 is architecturally illegal.

I also wouldn't consider this a "regression", as I'm not aware of any 
SMMU actually implementing HAFT yet - this is more just about ensuring 
architectural correctness is in place ready for the future. There should 
be plenty of time to figure out if and how you could still do what you 
want to do on future hardware, but if the SMMUv3 architecture itself 
breaks your idea of how the SMMUv3 driver should work, then forgive me 
for not having all that much sympathy, since my responsibility is 
primarily to support the architecture and correct usage thereof.

Thanks,
Robin.