[PATCH 5/6] ARM: dts: stm32: add sram pool to spi4 for DMA-MDMA chaining on MP15 DK

[Alain Volmat]

From: Clément Le Goffic <clement.legoffic at foss.st.com>

The sram pool is used as a buffer area during a spi transfer using
DMA-MDMA chaining.
The pool size depends on the SPI framework that creates sg up to
4096 bytes.

Signed-off-by: Clément Le Goffic <clement.legoffic at foss.st.com>
Signed-off-by: Alain Volmat <alain.volmat at foss.st.com>
---
 arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi
index 681e9b1106025..580f7da7f63f2 100644
--- a/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi
@@ -627,6 +627,11 @@ &spi4 {
 	pinctrl-names = "default", "sleep";
 	pinctrl-0 = <&spi4_pins_b>;
 	pinctrl-1 = <&spi4_sleep_pins_b>;
+	dmas = <&dmamux1 83 0x400 0x01>,
+	       <&dmamux1 84 0x400 0x01>,
+	       <&mdma1 0 0x3 0x1200000a 0 0>;
+	dma-names = "rx", "tx", "rxm2m";
+	sram = <&spi4_dma_pool>;
 	status = "disabled";
 };
 
@@ -637,6 +642,13 @@ &spi5 {
 	status = "disabled";
 };
 
+&sram4 {
+	spi4_dma_pool: dma-sram at 9000 {
+		reg = <0x9000 0x1000>;
+		pool;
+	};
+};
+
 &timers1 {
 	/* spare dmas for other usage */
 	/delete-property/dmas;

-- 
2.34.1