[RFC PATCH 17/36] arm64: remove daifflags.h
Jinjie Ruan
ruanjinjie at huawei.com
Wed Jul 22 01:00:40 PDT 2026
On 7/9/2026 8:13 PM, Vladimir Murzin wrote:
> From: Ada Couprie Diaz <ada.coupriediaz at arm.com>
>
> Interrupt masking is now split in different APIs and `local_daif_...`
> functions are not in use anymore.
> The `DAIF_...` masks defines are now in `asm/interrupts/common_flags.h`,
> so we can safely remove `daifflags.h` and all `#include`s referring to it.
>
> Only kprobes.c and process.c use `DAIF_...` masks defines, so add the
> new header there.
>
> Signed-off-by: Ada Couprie Diaz <ada.coupriediaz at arm.com>
> Signed-off-by: Vladimir Murzin <vladimir.murzin at arm.com>
> ---
> arch/arm64/include/asm/daifflags.h | 123 --------------------------
> arch/arm64/include/asm/entry-common.h | 1 -
> arch/arm64/include/asm/kvm_host.h | 1 -
> arch/arm64/include/asm/mmu_context.h | 1 -
> arch/arm64/kernel/debug-monitors.c | 1 -
> arch/arm64/kernel/probes/kprobes.c | 2 +-
> arch/arm64/kernel/signal.c | 1 -
> arch/arm64/kernel/traps.c | 1 -
> arch/arm64/mm/fault.c | 1 -
> 9 files changed, 1 insertion(+), 131 deletions(-)
> delete mode 100644 arch/arm64/include/asm/daifflags.h
Reviewed-by: Jinjie Ruan <ruanjinjie at huawei.com>
>
> diff --git a/arch/arm64/include/asm/daifflags.h b/arch/arm64/include/asm/daifflags.h
> deleted file mode 100644
> index 8f097a2d9099..000000000000
> --- a/arch/arm64/include/asm/daifflags.h
> +++ /dev/null
> @@ -1,123 +0,0 @@
> -/* SPDX-License-Identifier: GPL-2.0-only */
> -/*
> - * Copyright (C) 2017 ARM Ltd.
> - */
> -#ifndef __ASM_DAIFFLAGS_H
> -#define __ASM_DAIFFLAGS_H
> -
> -#include <linux/irqflags.h>
> -
> -#include <asm/arch_gicv3.h>
> -#include <asm/barrier.h>
> -#include <asm/cpufeature.h>
> -#include <asm/ptrace.h>
> -
> -#define DAIF_PROCCTX 0
> -#define DAIF_PROCCTX_NOIRQ (PSR_I_BIT | PSR_F_BIT)
> -#define DAIF_ERRCTX (PSR_A_BIT | PSR_I_BIT | PSR_F_BIT)
> -#define DAIF_MASK (PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT)
> -
> -
> -/* mask/save/unmask/restore all exceptions, including interrupts. */
> -static __always_inline void local_daif_mask(void)
> -{
> - WARN_ON(system_has_prio_mask_debugging() &&
> - (read_sysreg_s(SYS_ICC_PMR_EL1) == (GIC_PRIO_IRQOFF |
> - GIC_PRIO_PSR_I_SET)));
> -
> - asm volatile(
> - "msr daifset, #0xf // local_daif_mask\n"
> - :
> - :
> - : "memory");
> -
> - /* Don't really care for a dsb here, we don't intend to enable IRQs */
> - if (system_uses_irq_prio_masking())
> - gic_write_pmr(GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET);
> -
> - trace_hardirqs_off();
> -}
> -
> -static __always_inline unsigned long local_daif_save_flags(void)
> -{
> - unsigned long flags;
> -
> - flags = read_sysreg(daif);
> -
> - if (system_uses_irq_prio_masking()) {
> - /* If IRQs are masked with PMR, reflect it in the flags */
> - if (read_sysreg_s(SYS_ICC_PMR_EL1) != GIC_PRIO_IRQON)
> - flags |= PSR_I_BIT | PSR_F_BIT;
> - }
> -
> - return flags;
> -}
> -
> -static __always_inline unsigned long local_daif_save(void)
> -{
> - unsigned long flags;
> -
> - flags = local_daif_save_flags();
> -
> - local_daif_mask();
> -
> - return flags;
> -}
> -
> -static __always_inline void local_daif_restore(unsigned long flags)
> -{
> - bool irq_disabled = flags & PSR_I_BIT;
> -
> - WARN_ON(system_has_prio_mask_debugging() &&
> - (read_sysreg(daif) & (PSR_I_BIT | PSR_F_BIT)) != (PSR_I_BIT | PSR_F_BIT));
> -
> - if (!irq_disabled) {
> - trace_hardirqs_on();
> -
> - if (system_uses_irq_prio_masking()) {
> - gic_write_pmr(GIC_PRIO_IRQON);
> - pmr_sync();
> - }
> - } else if (system_uses_irq_prio_masking()) {
> - u64 pmr;
> -
> - if (!(flags & PSR_A_BIT)) {
> - /*
> - * If interrupts are disabled but we can take
> - * asynchronous errors, we can take NMIs
> - */
> - flags &= ~(PSR_I_BIT | PSR_F_BIT);
> - pmr = GIC_PRIO_IRQOFF;
> - } else {
> - pmr = GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET;
> - }
> -
> - /*
> - * There has been concern that the write to daif
> - * might be reordered before this write to PMR.
> - * From the ARM ARM DDI 0487D.a, section D1.7.1
> - * "Accessing PSTATE fields":
> - * Writes to the PSTATE fields have side-effects on
> - * various aspects of the PE operation. All of these
> - * side-effects are guaranteed:
> - * - Not to be visible to earlier instructions in
> - * the execution stream.
> - * - To be visible to later instructions in the
> - * execution stream
> - *
> - * Also, writes to PMR are self-synchronizing, so no
> - * interrupts with a lower priority than PMR is signaled
> - * to the PE after the write.
> - *
> - * So we don't need additional synchronization here.
> - */
> - gic_write_pmr(pmr);
> - }
> -
> - write_sysreg(flags, daif);
> -
> - if (irq_disabled)
> - trace_hardirqs_off();
> -}
> -
> -#endif
> diff --git a/arch/arm64/include/asm/entry-common.h b/arch/arm64/include/asm/entry-common.h
> index 1905765159aa..73d82a8d8e95 100644
> --- a/arch/arm64/include/asm/entry-common.h
> +++ b/arch/arm64/include/asm/entry-common.h
> @@ -6,7 +6,6 @@
> #include <linux/thread_info.h>
>
> #include <asm/cpufeature.h>
> -#include <asm/daifflags.h>
> #include <asm/fpsimd.h>
> #include <asm/mte.h>
> #include <asm/stacktrace.h>
> diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
> index bae2c4f92ef5..74358e93f1bb 100644
> --- a/arch/arm64/include/asm/kvm_host.h
> +++ b/arch/arm64/include/asm/kvm_host.h
> @@ -23,7 +23,6 @@
> #include <asm/barrier.h>
> #include <asm/cpufeature.h>
> #include <asm/cputype.h>
> -#include <asm/daifflags.h>
> #include <asm/fpsimd.h>
> #include <asm/kvm.h>
> #include <asm/kvm_asm.h>
> diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h
> index 803b68758152..b3354a1350cf 100644
> --- a/arch/arm64/include/asm/mmu_context.h
> +++ b/arch/arm64/include/asm/mmu_context.h
> @@ -19,7 +19,6 @@
>
> #include <asm/cacheflush.h>
> #include <asm/cpufeature.h>
> -#include <asm/daifflags.h>
> #include <asm/gcs.h>
> #include <asm/proc-fns.h>
> #include <asm/cputype.h>
> diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c
> index e271fbac5f82..5db27c7e86bb 100644
> --- a/arch/arm64/kernel/debug-monitors.c
> +++ b/arch/arm64/kernel/debug-monitors.c
> @@ -19,7 +19,6 @@
>
> #include <asm/cpufeature.h>
> #include <asm/cputype.h>
> -#include <asm/daifflags.h>
> #include <asm/debug-monitors.h>
> #include <asm/exception.h>
> #include <asm/kgdb.h>
> diff --git a/arch/arm64/kernel/probes/kprobes.c b/arch/arm64/kernel/probes/kprobes.c
> index 43a0361a8bf0..d9d25d184309 100644
> --- a/arch/arm64/kernel/probes/kprobes.c
> +++ b/arch/arm64/kernel/probes/kprobes.c
> @@ -24,9 +24,9 @@
> #include <linux/vmalloc.h>
>
> #include <asm/cacheflush.h>
> -#include <asm/daifflags.h>
> #include <asm/debug-monitors.h>
> #include <asm/insn.h>
> +#include <asm/interrupts/common_flags.h>
> #include <asm/irq.h>
> #include <asm/text-patching.h>
> #include <asm/ptrace.h>
> diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c
> index 38e6fa204c17..2276d316cc9e 100644
> --- a/arch/arm64/kernel/signal.c
> +++ b/arch/arm64/kernel/signal.c
> @@ -22,7 +22,6 @@
> #include <linux/syscalls.h>
> #include <linux/pkeys.h>
>
> -#include <asm/daifflags.h>
> #include <asm/debug-monitors.h>
> #include <asm/elf.h>
> #include <asm/exception.h>
> diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c
> index 914282016069..77b6be6fc4c1 100644
> --- a/arch/arm64/kernel/traps.c
> +++ b/arch/arm64/kernel/traps.c
> @@ -33,7 +33,6 @@
> #include <asm/atomic.h>
> #include <asm/bug.h>
> #include <asm/cpufeature.h>
> -#include <asm/daifflags.h>
> #include <asm/debug-monitors.h>
> #include <asm/efi.h>
> #include <asm/esr.h>
> diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
> index 85e23388f9bb..83aca64745f0 100644
> --- a/arch/arm64/mm/fault.c
> +++ b/arch/arm64/mm/fault.c
> @@ -34,7 +34,6 @@
> #include <asm/cpufeature.h>
> #include <asm/efi.h>
> #include <asm/exception.h>
> -#include <asm/daifflags.h>
> #include <asm/debug-monitors.h>
> #include <asm/esr.h>
> #include <asm/kprobes.h>
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