[PATCH v2] PCI: imx6: Fix i.MX6Q/DL boot hang by separating PHY power and reference clock control
Francesco Dolcini
francesco at dolcini.it
Thu Jul 16 23:10:24 PDT 2026
On Thu, Jul 16, 2026 at 11:43:31AM -0300, Leonardo Costa wrote:
> On Wed, Jul 08, 2026 at 11:59:27AM +0800, hongxing.zhu at oss.nxp.com wrote:
> > From: Richard Zhu <hongxing.zhu at nxp.com>
> >
> > Commit 610fa91d9863 ("PCI: imx6: Assert PERST# before enabling regulators")
> > introduced a boot hang on i.MX6Q/DL variants by changing the initialization
> > sequence.
> >
> > The issue stems from coupling PHY power (TEST_PD) and reference clock
> > (REF_CLK_EN) control in imx6q_pcie_enable_ref_clk(). When these are
> > managed together, the timing between PHY power-up and reference clock
> > enablement cannot be properly controlled, leading to initialization
> > failures.
> >
> > Fix this by separating the two concerns:
> >
> > - Move PHY power control (TEST_PD) to imx6q_pcie_core_reset() where it
> > logically belongs with reset operations. This ensures PHY power state
> > is managed as part of the core reset sequence.
> >
> > - Update imx6qp_pcie_core_reset() to call imx6q_pcie_core_reset() for
> > shared PHY power management, avoiding code duplication.
> >
> > - Make imx6q_pcie_enable_ref_clk() responsible only for reference clock
> > (REF_CLK_EN) control, simplifying its purpose.
> >
> > - Remove the 10us delay workaround from imx6q_pcie_enable_ref_clk() as
> > proper sequencing is now handled by the core_reset functions.
> >
> > This refactoring ensures PHY power is controlled during reset
> > operations, fixing the boot hang while improving code maintainability.
> >
> > Fixes: 610fa91d9863 ("PCI: imx6: Assert PERST# before enabling regulators")
> > Signed-off-by: Richard Zhu <hongxing.zhu at nxp.com>
> > ---
>
> Tested-by: Leonardo Costa <leonardo.costa at toradex.com>
Reported-by: Leonardo Costa <leoreis.costa at gmail.com>
Closes: https://lore.kernel.org/lkml/20260629143439.361560-1-leoreis.costa@gmail.com/
Bjorn: this should solve the concerns your questions from https://lore.kernel.org/lkml/20260716172858.GA111215@bhelgaas/
Francesco
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