[RFC PATCH 11/36] arm64: interrupts: introduce interrupt masking helpers for entry code
Vladimir Murzin
vladimir.murzin at arm.com
Wed Jul 15 03:39:36 PDT 2026
On 7/10/26 10:39, Jinjie Ruan wrote:
>> +static __always_inline
>> +void arm64_update_exc_hwstate(arm64_exc_hwstate_t hwstate, bool update_pmr)
>> +{
>> + if (system_uses_irq_prio_masking() &&
>> + update_pmr &&
>> + hwstate.pmr == GIC_PRIO_IRQOFF) {
>> + /*
>> + * There has been concern that the write to daif
>> + * might be reordered before this write to PMR.
>> + * From the ARM ARM DDI 0487D.a, section D1.7.1
>> + * "Accessing PSTATE fields":
>> + * Writes to the PSTATE fields have side-effects on
>> + * various aspects of the PE operation. All of these
>> + * side-effects are guaranteed:
>> + * - Not to be visible to earlier instructions in
>> + * the execution stream.
>> + * - To be visible to later instructions in the
>> + * execution stream
>> + *
>> + * Also, writes to PMR are self-synchronizing, so no
>> + * interrupts with a lower priority than PMR is signaled
>> + * to the PE after the write.
>> + *
>> + * So we don't need additional synchronization here.
>> + */
>> + write_sysreg_s(hwstate.pmr, SYS_ICC_PMR_EL1);
>> + pmr_sync();
>> + }
>> +
>> + write_sysreg(hwstate.daif, daif);
>> +
>> + if (system_uses_irq_prio_masking() &&
>> + update_pmr &&
>> + hwstate.pmr == GIC_PRIO_IRQON) {
>> + write_sysreg_s(hwstate.pmr, SYS_ICC_PMR_EL1);
>> + pmr_sync();
>> + }
> The default behavior of both local_daif_restore() and
> local_daif_inherit() is to first restore the PMR register and then
> restore DAIF. It appears that there has been a functional change here.
Please see my other reply on this patch for the rationale behind
structuring this function this way.
Cheers
Vladimir
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