[PATCH v2 25/28] KVM: arm64: Engage NV3 TLBI trap elision

[Marc Zyngier]

On Wed, 15 Jul 2026 01:16:44 +0100,
Wei-Lin Chang <weilin.chang at arm.com> wrote:
> 
> On Tue, Jul 14, 2026 at 10:16:38AM +0100, Marc Zyngier wrote:
> > Similarly to the ERET elision mechanism, FEAT_NV3 can elide TLBIs
> > that only affects the guest's S1 translation. Enable this, with the
> > express condition that the guest isn't NV2 aware, as we otherwise
> > need to trap these TLBIs to deal with VNCR mappings.
> > 
> > Signed-off-by: Marc Zyngier <maz at kernel.org>
> > ---
> >  arch/arm64/include/asm/kvm_emulate.h | 13 +++++++++++++
> >  1 file changed, 13 insertions(+)
> > 
> > diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h
> > index b32870a5e1236..d17b161d4ba3a 100644
> > --- a/arch/arm64/include/asm/kvm_emulate.h
> > +++ b/arch/arm64/include/asm/kvm_emulate.h
> > @@ -715,6 +715,19 @@ static inline void vcpu_set_hcrx(struct kvm_vcpu *vcpu)
> >  		if (cpus_have_final_cap(ARM64_HAS_NV3) &&
> >  		    vcpu_has_nv(vcpu) && vcpu_el2_e2h_is_set(vcpu)) {
> >  			vcpu->arch.hcrx_el2 |= HCRX_EL2_NVTGE;
> > +
> > +			/*
> > +			 * If the guest is NV2-capable, then we need to see
> > +			 * all the TLBIs, as configured in HCR_EL2.
> > +			 * Otherwise, relax the TLBI traps to only TGE=0.
> > +			 */
> > +			if (!kvm_has_nv2(vcpu->kvm)) {
> > +				vcpu->arch.hcrx_el2 |= (HCRX_EL2_NVnTTLB   |
> > +							HCRX_EL2_NVnTTLBIS);
> > +
> > +				if (kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, OS))
> > +					vcpu->arch.hcrx_el2 |= HCRX_EL2_NVnTTLBOS;;
> > +			}
> 
> I also suspected if this is dead code, but Sashiko had beat me to it :P
> So from your response in v1, is this code here just for completeness?

No, this is functional. It is just that we don't have any way to
expose to a nested guest something that would be in the outer
shareable domain, and not in the inner one.

> It's amusing that we're not able to take advantage of this feature at
> all!

We can. It is just that there is nothing out there that will exercise
it.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.