[PATCH net-next v3 4/4] net: stmmac: dwmac-socfpga: Add support for Agilex5 TSN GMAC with FPGA converter
Andrew Lunn
andrew at lunn.ch
Tue Jul 14 18:22:54 PDT 2026
On Mon, Jul 13, 2026 at 07:13:03PM -0700, muhammad.nazim.amirul.nazle.asmade at altera.com wrote:
> From: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade at altera.com>
>
> The Agilex5 SoCDK TSN Config2 board uses a GMII-to-RGMII converter
> implemented as FPGA soft IP between gmac1 and its PHY. This converter
> provides the RGMII TX/RX clock delays, so the MAC interface selector
> must be configured for GMII while the PHY is configured without delays.
>
> Add the "altr,socfpga-stmmac-agilex5-tsn" compatible to the match table
> and detect it in probe to force GMII for the MAC interface selector and
> strip the delay bits from phy_interface so the PHY is not configured to
> add delays already provided by the FPGA converter.
>
> Signed-off-by: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade at altera.com>
Reviewed-by: Andrew Lunn <andrew at lunn.ch>
Andrew
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