[RFC PATCH 25/36] arm64: sysreg: Add definitions for immediate versions of MSR ALLINT

Jinjie Ruan ruanjinjie at huawei.com
Tue Jul 14 04:01:27 PDT 2026



On 7/9/2026 8:13 PM, Vladimir Murzin wrote:
> From: Mark Brown <broonie at kernel.org>
> 
> Encodings are provided for ALLINT which allow setting of ALLINT.ALLINT
> using an immediate rather than requiring that a register be loaded with
> the value to write. Since these don't currently fit within the scheme we
> have for sysreg generation add manual encodings like we currently do for
> other similar registers such as SVCR.
> 
> Since it is required that these immediate versions be encoded with xzr
> as the source register, provide asm wrappers which ensure this is the
> case.
> 
> Signed-off-by: Mark Brown <broonie at kernel.org>
> Signed-off-by: Ada Couprie Diaz <ada.coupriediaz at arm.com>
> Signed-off-by: Vladimir Murzin <vladimir.murzin at arm.com>
> ---
>  arch/arm64/include/asm/interrupts/common_flags.h | 16 ++++++++++++++++
>  arch/arm64/include/asm/sysreg.h                  |  2 ++
>  2 files changed, 18 insertions(+)
> 
> diff --git a/arch/arm64/include/asm/interrupts/common_flags.h b/arch/arm64/include/asm/interrupts/common_flags.h
> index 6ce60d1519e8..72ed6e75d146 100644
> --- a/arch/arm64/include/asm/interrupts/common_flags.h
> +++ b/arch/arm64/include/asm/interrupts/common_flags.h
> @@ -44,6 +44,22 @@ typedef enum arm64_exc_context {
>  	CRITICAL_CONTEXT,
>  } arm64_exc_context_t;
>  
> +
> +#ifdef CONFIG_ARM64_NMI
> +static __always_inline void _allint_clear(void)
> +{
> +	asm volatile(__msr_s(SYS_ALLINT_CLR, "xzr"));
> +}
> +
> +static __always_inline void _allint_set(void)
> +{
> +	asm volatile(__msr_s(SYS_ALLINT_SET, "xzr"));
> +}
> +#else
> +static __always_inline void _allint_clear(void) {}
> +static __always_inline void _allint_set(void) {}
> +#endif /* CONFIG_ARM64_NMI */

Reviewed-by: Jinjie Ruan <ruanjinjie at huawei.com>


> +
>  static __always_inline
>  arm64_exc_hwstate_t __arm64_exc_hwstate_of_process_context(void)
>  {
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 7aa08d59d494..6d2c6bc1b985 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -179,6 +179,8 @@
>   * System registers, organised loosely by encoding but grouped together
>   * where the architected name contains an index. e.g. ID_MMFR<n>_EL1.
>   */
> +#define SYS_ALLINT_CLR			sys_reg(0, 1, 4, 0, 0)
> +#define SYS_ALLINT_SET			sys_reg(0, 1, 4, 1, 0)
>  #define SYS_SVCR_SMSTOP_SM_EL0		sys_reg(0, 3, 4, 2, 3)
>  #define SYS_SVCR_SMSTART_SM_EL0		sys_reg(0, 3, 4, 3, 3)
>  #define SYS_SVCR_SMSTOP_SMZA_EL0	sys_reg(0, 3, 4, 6, 3)




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