[PATCH v2 1/4] arm64: dts: ti: var-som-am62p: fix Ethernet PHY configuration

[Stefano Radaelli]

On Tue, Jul 14, 2026 at 11:36:29AM +0530, Vignesh Raghavendra wrote:
> On 2026-07-13 15:32:00+02:00, Stefano Radaelli wrote:
> > On Mon, Jul 13, 2026 at 04:02:34PM +0530, Vignesh Raghavendra wrote:
> > 
> > > >  
> > > 
> > > So are the reset delays no longer required? Or they taken care of
> > > somewhere else?
> > > 
> > > 
> > 
> > Hi Vignesh,
> > 
> > No, because this GPIO actually is not used as a PHY reset.
> > 
> > After reviewing the hardware, it turned out that this signal is a
> > board-level enable signal required for the PHY to operate, rather than
> > a reset line.
> > The previous reset-assert-us and reset-deassert-us values were
> > associated with the incorrect modelling of this GPIO as a reset, and
> > are not longer needed.
> > 
> 
> Along the same lines does [0] need update to how the cpsw3g_phy0 is
> described then as its seems very similar to what this patch is addressing?
> 
> [0] https://lore.kernel.org/linux-arm-kernel/0a7bdfda80309eaa207b5b369d72f4bcb16e0604.1783864932.git.stefano.r@variscite.com/
> 
> > 
> > Best Regards,
> > Stefano
> 

Hi Vignesh,

No, the AM62 DTS referenced in [0] does not need the same update.

The VAR-SOM-AM62 uses a different Ethernet PHY and has separate signals
for the PHY supply enable and PHY reset. In that design, GPIO0_45
controls the PHY 3.3 V supply, while GPIO0_46 is connected to the PHY
reset input, so the existing reset-gpios description is correct.

The issue addressed by this patch is specific to the VAR-SOM-AM62P.

Thank you for your review,
Best Regards,
Stefano