[PATCH v2 1/4] arm64: dts: ti: var-som-am62p: fix Ethernet PHY configuration

Stefano Radaelli stefano.radaelli21 at gmail.com
Mon Jul 13 06:32:00 PDT 2026


On Mon, Jul 13, 2026 at 04:02:34PM +0530, Vignesh Raghavendra wrote:
> >  
> >  &cpsw3g_mdio {
> > @@ -159,9 +169,9 @@ &cpsw3g_mdio {
> >  	cpsw3g_phy0: ethernet-phy at 4 {
> >  		compatible = "ethernet-phy-id0283.bc30";
> >  		reg = <4>;
> > -		reset-gpios = <&main_gpio0 46 GPIO_ACTIVE_LOW>;
> > -		reset-assert-us = <10000>;
> > -		reset-deassert-us = <100000>;
> 
> So are the reset delays no longer required? Or they taken care of
> somewhere else?
> 
> > +		bootph-all;
> > +		enet-phy-lane-no-swap;
> > +		vdd-supply = <&reg_eth_phy_vdd>;
> >  	};
> >  };
> >  
> 
> -- 
> Regards
> Vignesh
> https://ti.com/opensource
> 

Hi Vignesh,

No, because this GPIO actually is not used as a PHY reset.

After reviewing the hardware, it turned out that this signal is a
board-level enable signal required for the PHY to operate, rather than
a reset line.
The previous reset-assert-us and reset-deassert-us values were
associated with the incorrect modelling of this GPIO as a reset, and
are not longer needed.

Thank you!

Best Regards,
Stefano



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