[RFC PATCH 32/36] arm64: suspend: Always initialise PSTATE.ALLINT

[Jinjie Ruan]

On 7/9/2026 8:13 PM, Vladimir Murzin wrote:
> PSTATE.ALLINT is always set to the inverse of SCTLR_ELx.SPINTMASK,
> regardless of the value of SCTLR_ELx.NMI. SCTLR_ELx.NMI is initialised
> to 0 by default, so PSTATE.ALLINT does not cause any interrupt
> masking. With upcoming FEAT_NMI support, SCTLR_ELx.NMI will be set as
> part of the enable sequence.
> 
> However, during CPU suspend/resume, we reinitialise PSTATE to
> INIT_PSTATE_EL1. INIT_PSTATE_EL1 currently does not set
> PSR_ALLINT_BIT, but SCTLR_ELx.NMI is restored from the saved
> value. Since all exceptions are masked during CPU suspend/resume,
> avoid a state where SCTLR_ELx.NMI is restored to 1 but PSTATE.ALLINT
> is clear, since that would permit an NMI during resume.
> 
> Include PSR_ALLINT_BIT in INIT_PSTATE_EL1 so PSTATE.ALLINT is always
> set.
> 
> Signed-off-by: Vladimir Murzin <vladimir.murzin at arm.com>
> ---
>  arch/arm64/include/asm/ptrace.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
> index 096d85d75bd7..ab1cf7669140 100644
> --- a/arch/arm64/include/asm/ptrace.h
> +++ b/arch/arm64/include/asm/ptrace.h
> @@ -17,7 +17,7 @@
>  #define CurrentEL_EL2		(2 << 2)
>  
>  #define INIT_PSTATE_EL1 \
> -	(PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL1h)
> +	(PSR_ALLINT_BIT | PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL1h)

Reviewed-by: Jinjie Ruan <ruanjinjie at huawei.com>

>  
>  #include <linux/irqchip/arm-gic-v3-prio.h>
>