[PATCH v2 5/8] iommu/arm-smmu-v3: Precompute the invalidation commands

Nicolin Chen nicolinc at nvidia.com
Thu Jul 9 12:10:05 PDT 2026


On Thu, Jul 09, 2026 at 09:07:44AM -0300, Jason Gunthorpe wrote:
> I'm not keen on gotos outside error unwind, but how about
> 
> +       tlbi->range.data1 =
> +               FIELD_PREP(CMDQ_TLBI_1_LEAF, !tlbi->table_levels_bitmap) |
> +               FIELD_PREP(CMDQ_TLBI_1_TG, tg_enc) | (cur_tg << tg_lg2);
> +
>         /*
>          * SMMUv3 H.a Section 4.4.1.1: TG!=0, NUM==0, SCALE==0, TTL==0 is
>          * Reserved and causes CERROR_ILL. Single page uses NUM=0, SCALE=0 with
> @@ -2472,11 +2476,7 @@ static void arm_smmu_tlbi_calc_range(struct arm_smmu_tlbi *tlbi,
>                 if (WARN_ON(!ttl))
>                         ttl = 3;
>                 tlbi->range.data0 = 0;
> -               tlbi->range.data1 = FIELD_PREP(CMDQ_TLBI_1_LEAF,
> -                                              !tlbi->table_levels_bitmap) |
> -                                   FIELD_PREP(CMDQ_TLBI_1_TTL, ttl) |
> -                                   FIELD_PREP(CMDQ_TLBI_1_TG, tg_enc) |
> -                                   (cur_tg << tg_lg2);
> +               tlbi->range.data1 |= FIELD_PREP(CMDQ_TLBI_1_TTL, ttl);
>                 return;
>         }
>  
> @@ -2513,11 +2513,7 @@ static void arm_smmu_tlbi_calc_range(struct arm_smmu_tlbi *tlbi,
>                 FIELD_PREP(CMDQ_TLBI_0_NUM,
>                            DIV_ROUND_UP_ULL(num_tg, 1ULL << scale) - 1) |
>                 FIELD_PREP(CMDQ_TLBI_0_SCALE, scale);
> -       tlbi->range.data1 =
> -               FIELD_PREP(CMDQ_TLBI_1_LEAF, !tlbi->table_levels_bitmap) |
> -               FIELD_PREP(CMDQ_TLBI_1_TTL, ttl) |
> -               FIELD_PREP(CMDQ_TLBI_1_TG, tg_enc) |
> -               (cur_tg << tg_lg2);
> +       tlbi->range.data1 |= FIELD_PREP(CMDQ_TLBI_1_TTL, ttl);
>  }
> 
> Which removes most of the duplication

Yea, that looks very clean.

Nicolin



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