[PATCH v8 08/13] coresight: etm4x: fix inconsistencies with sysfs configuration

Leo Yan leo.yan at arm.com
Tue Jul 7 01:07:03 PDT 2026


On Mon, Jul 06, 2026 at 07:20:48PM +0100, Yeoreum Yun wrote:

[...]

> > However, a corner case was mentioned by Sashiko:
> > 
> >  | It appears etm4_enable_hw() modifies drvdata->ss_status while executing
> >  | via IPI, but sshot_ctrl_store() can modify the same array concurrently
> >  | from process context since the lock is no longer held across the
> >  | smp_call_function_single() call.
> > 
> > "drvdata->ss_status" is a race condition between SMP call and sysfs
> > knobs. Should we change to spinlock_irqsave/irqrestore when access
> > drvdata->ss_status?
> 
> I know this, but  This is currently ignorable since
> whatever perf or sysfs session, the ss_status is always clear
> the PENDING and STATUS bits (and we make a compromise for this right now).
> 
> And the sshot_ctrl_store()'s action is always clear above bits.
> 
> So, This is ignorable comment from Sashiko.

I understand it now, we can ignore it. Thanks for explanation.



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