[PATCH v1 1/5] iommu/arm-smmu-v3-iommufd: Reject unsupported bits in invalidation commands

Jason Gunthorpe jgg at nvidia.com
Mon Jul 6 10:16:32 PDT 2026


On Mon, Jun 29, 2026 at 02:15:36PM -0700, Nicolin Chen wrote:
> +	case CMDQ_OP_TLBI_NH_VAA:
> +		allowed[0] |= CMDQ_TLBI_0_VMID;
> +		allowed[1] |= CMDQ_TLBI_1_LEAF | CMDQ_TLBI_1_TTL |
> +			      CMDQ_TLBI_1_VA_MASK;
> +		/* NUM/SCALE/TG are range fields gated on FEAT_RANGE_INV */
> +		if (vsmmu->smmu->features & ARM_SMMU_FEAT_RANGE_INV) {
> +			allowed[0] |= CMDQ_TLBI_0_NUM | CMDQ_TLBI_0_SCALE;
> +			allowed[1] |= CMDQ_TLBI_1_TG;
> +		}

There are a couple of additional conditions on tg and num in the spec
under RIL which are reserved and illegal, I guess those should be
checked too if we want to block any illegal command

Jason



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