[PATCH v3 0/6] iommu/arm-smmu: Add interconnect bandwidth voting support
Bibek Kumar Patro
bibek.patro at oss.qualcomm.com
Mon Jul 6 09:56:33 PDT 2026
On some Qualcomm SoCs the SMMU register space is gated behind an
interconnect fabric that requires an active bandwidth vote before
registers can be accessed. In the common case this vote is held
implicitly by other clients (e.g. the GMU device holds a GEM_NOC
vote whenever the GPU is active), so the SMMU works without any
explicit vote from the driver.
However, during certain power transitions — specifically sleep/wakeup
sequences — the interconnect vote can be dropped before the SMMU is
powered down. If the SMMU is then accessed (e.g. during runtime
resume) while the vote is absent, register reads fail intermittently.
The precise ordering makes this difficult to reproduce consistently.
This series adds support for an optional interconnect path in the
arm-smmu driver. When an 'interconnects' property is present in the
SMMU device node, the driver acquires the path and votes for bandwidth
before any register access, releasing the vote on runtime suspend and
on error paths. Platforms that do not describe an interconnect path
are unaffected.
Changes in v3:
- iommu/arm-smmu: Moved ICC voting from generic arm-smmu.c to
Qualcomm-specific arm-smmu-qcom.c via new runtime_resume and
runtime_suspend hooks in struct arm_smmu_impl, as suggested by
Konrad Dybcio.
- iommu/arm-smmu: Moved icc_path from arm_smmu_device to
qcom_smmu to keep Qualcomm-specific fields out of the generic
driver.
- iommu/arm-smmu: Restructured arm_smmu_icc_get() error path to
exit early on success as suggested by Dmitry Baryshkov.
- iommu/arm-smmu: Dropped if (smmu->icc_path) guards from
icc_enable/disable since icc_set_bw() handles NULL path safely.
- iommu/arm-smmu: Changed WARN_ON() to WARN_ON_ONCE() and
propagate error code to callers.
- iommu/arm-smmu: Changed ARM_SMMU_ICC_PEAK_BW_HIGH from 1000
to 1 kBps as a minimal keep-alive vote.
- Link to v2: https://lore.kernel.org/r/20260526-smmu_interconnect_addition-v2-0-2a6d8ca30d63@oss.qualcomm.com
Changes in v2:
- dt-bindings: Cleaned up 'interconnects' property description —
removed "Optional" prefix and driver implementation details as
flagged by Krzysztof Kozlowski.
- dt-bindings: Added allOf conditional using 'items' to restrict the
'interconnects' property to Adreno SMMU nodes only (qcom,adreno-smmu
with qcom,qcs615-smmu-500, qcom,qcs8300-smmu-500,
qcom,sa8775p-smmu-500 or qcom,sc7280-smmu-500 compatible), so
non-Adreno SMMU nodes on the same SoC cannot use this property.
- Added DTS patches for kodiak, lemans, monaco and talos to add
the GEM_NOC interconnect path for the adreno_smmu node on each
platform.
Link to v1:
https://lore.kernel.org/all/20260516-smmu_interconnect_addition-v1-0-f889d933f5c1@oss.qualcomm.com/
Signed-off-by: Bibek Kumar Patro <bibek.patro at oss.qualcomm.com>
---
Bibek Kumar Patro (6):
dt-bindings: iommu: arm,smmu: Document interconnects property
iommu/arm-smmu: Add interconnect bandwidth voting support
arm64: dts: qcom: kodiak: Add GEM_NOC interconnect for adreno SMMU
arm64: dts: qcom: lemans: Add GEM_NOC interconnect for adreno SMMU
arm64: dts: qcom: monaco: Add GEM_NOC interconnect for adreno SMMU
arm64: dts: qcom: talos: Add GEM_NOC interconnect for adreno SMMU
.../devicetree/bindings/iommu/arm,smmu.yaml | 27 +++++++++++
arch/arm64/boot/dts/qcom/kodiak.dtsi | 2 +
arch/arm64/boot/dts/qcom/lemans.dtsi | 2 +
arch/arm64/boot/dts/qcom/monaco.dtsi | 2 +
arch/arm64/boot/dts/qcom/talos.dtsi | 2 +
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 55 +++++++++++++++++++++-
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h | 3 ++
drivers/iommu/arm/arm-smmu/arm-smmu.c | 27 ++++++++++-
drivers/iommu/arm/arm-smmu/arm-smmu.h | 2 +
9 files changed, 119 insertions(+), 3 deletions(-)
---
base-commit: 8e9685d3c41c35dd1b37df70d854137abcb2fbac
change-id: 20260516-smmu_interconnect_addition-d9567535e9d7
Best regards,
--
Bibek Kumar Patro <bibek.patro at oss.qualcomm.com>
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