[PATCH v1] PCI: imx6: Add runtime PM support for i.MX95

Frank Li Frank.li at oss.nxp.com
Mon Jul 6 08:48:11 PDT 2026


On Mon, Jul 06, 2026 at 05:16:39PM +0800, hongxing.zhu at oss.nxp.com wrote:
> From: Richard Zhu <hongxing.zhu at nxp.com>
>
> Enable runtime PM support for i.MX95 PCIe Root Complex to allow dynamic
> power management when the PCIe link is idle.
>
> The i.MX95 PCIe controller supports entering D3hot state when PCIe
> devices are not actively in use. This implementation uses
> pm_runtime_no_callbacks() to leverage the PCI core's generic runtime PM
> handling. The PCI core automatically manages D-state transitions based
> on the runtime PM state of connected endpoint devices.
>
> Signed-off-by: Richard Zhu <hongxing.zhu at nxp.com>
> ---
>  drivers/pci/controller/dwc/pci-imx6.c | 20 +++++++++++++++++++-
>  1 file changed, 19 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 023145b0dd2c7..3c13f9888ab9a 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -130,6 +130,7 @@ enum imx_pcie_variants {
>  #define IMX_PCIE_FLAG_SKIP_L23_READY		BIT(12)
>  /* Preserve MSI capability for platforms that require it */
>  #define IMX_PCIE_FLAG_KEEP_MSI_CAP		BIT(13)
> +#define IMX_PCIE_FLAG_PM_RUNTIME		BIT(14)
>
>  #define imx_check_flag(pci, val)	(pci->drvdata->flags & val)
>
> @@ -1982,6 +1983,16 @@ static int imx_pcie_probe(struct platform_device *pdev)
>  		 */
>  		imx_pcie_add_lut_by_rid(imx_pcie, 0);
>  	} else {
> +		if (imx_pcie->drvdata->flags & IMX_PCIE_FLAG_PM_RUNTIME) {
> +			pm_runtime_no_callbacks(dev);
> +			devm_pm_runtime_enable(dev);

Need check return value;

> +			ret = pm_runtime_get_sync(dev);

Is devm_pm_runtime_set_active_enabled() and devm_pm_runtime_get_noresume()
help your case? and simplify below error path.

> +			if (ret < 0) {
> +				pm_runtime_put_noidle(dev);
> +				return ret;
> +			}
> +		}
> +
>  		/*
>  		 * i.MX RC is powered off during suspend, force L2 entry to
>  		 * ensure proper endpoint notification before power loss.
> @@ -1993,8 +2004,11 @@ static int imx_pcie_probe(struct platform_device *pdev)
>  			pci->pp.keep_rp_msi_en = true;
>  		pci->pp.use_atu_msg = true;
>  		ret = dw_pcie_host_init(&pci->pp);
> -		if (ret < 0)
> +		if (ret < 0) {
> +			if (imx_pcie->drvdata->flags & IMX_PCIE_FLAG_PM_RUNTIME)
> +				pm_runtime_put(dev);
>  			return ret;
> +		}
>
>  		if (pci_msi_enabled()) {
>  			u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_MSI);
> @@ -2012,6 +2026,9 @@ static void imx_pcie_shutdown(struct platform_device *pdev)
>  {
>  	struct imx_pcie *imx_pcie = platform_get_drvdata(pdev);
>
> +	if (imx_pcie->drvdata->flags & IMX_PCIE_FLAG_PM_RUNTIME)
> +		pm_runtime_disable(&pdev->dev);
> +

You use devm_pm_runtime_enable(), Needn't call pm_runtime_disable here.

Frank


>  	/* bring down link, so bootloader gets clean state in case of reboot */
>  	imx_pcie_assert_core_reset(imx_pcie);
>  	imx_pcie_assert_perst(imx_pcie, true);
> @@ -2130,6 +2147,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
>  		.flags = IMX_PCIE_FLAG_HAS_SERDES |
>  			 IMX_PCIE_FLAG_HAS_LUT |
>  			 IMX_PCIE_FLAG_8GT_ECN_ERR051586 |
> +			 IMX_PCIE_FLAG_PM_RUNTIME |
>  			 IMX_PCIE_FLAG_SUPPORTS_SUSPEND,
>  		.ltssm_off = IMX95_PE0_GEN_CTRL_3,
>  		.ltssm_mask = IMX95_PCIE_LTSSM_EN,
> --
> 2.34.1
>
>



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