[PATCH v4 5/6] irqchip/gic-v3-its: Fix grammar and replace a bit number with its symbol

[Radu Rendec]

On Thu, 2026-07-02 at 11:30 +0800, Kemeng Shi wrote:
> Fix grammatical errors in comments and replace the bit offset '62'
> with GITS_BASER_INDIRECT for better readability.
> 
> Signed-off-by: Kemeng Shi <shikemeng at huaweicloud.com>
> ---
>  drivers/irqchip/irq-gic-v3-its.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index 244509701070..120f6f29e978 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -163,7 +163,7 @@ struct event_lpi_map {
>  
>  /*
>   * The ITS view of a device - belongs to an ITS, owns an interrupt
> - * translation table, and a list of interrupts.  If it some of its
> + * translation table, and a list of interrupts.  If some of its
>   * LPIs are injected into a guest (GICv4), the event_map.vm field
>   * indicates which one.
>   */
> @@ -2504,7 +2504,7 @@ static bool its_parse_indirect_baser(struct its_node *its,
>  	if ((esz << ids) > (psz * 2)) {
>  		/*
>  		 * Find out whether hw supports a single or two-level table by
> -		 * table by reading bit at offset '62' after writing '1' to it.
> +		 * reading GITS_BASER_INDIRECT after writing '1' to it.

I think the second line is redundant anyway. Anyone who can read C can
immediately see the code is checking the bit after setting it to 1. The
not so obvious part is that the read back happens in its_write_baser().
But the way the code is written implies that baser->val is somehow
updated in its_write_baser(), and if one looks at it, then it's clear.

In the original comment, "table by" appeared twice. I would just get
rid of the second line altogether and stop at "table".

>  		 */
>  		its_write_baser(its, baser, val | GITS_BASER_INDIRECT);
>  		indirect = !!(baser->val & GITS_BASER_INDIRECT);