[PATCH 5/5] arm64: cpufeature: Extend bbml3 support list

[Linu Cherian]

Hi Mark,

On Thu, Jul 02, 2026 at 11:47:04AM +0100, Mark Rutland wrote:
> On Wed, Jul 01, 2026 at 03:11:31PM +0530, Linu Cherian wrote:
> > Add below cpus to the midr list, which supports
> > BBML3 but don't advertise through MMFR2 ID.
> > 
> > Cortex A520(AE)
> > Cortex A715
> > Cortex A720(AE)
> > Cortex A725
> > Neoverse N3
> > C1-Nano
> > C1-Pro
> > C1-Ultra
> > C1-Premium
> > 
> > Signed-off-by: Linu Cherian <linu.cherian at arm.com>
> > ---
> >  arch/arm64/kernel/cpufeature.c | 9 +++++++++
> >  1 file changed, 9 insertions(+)
> > 
> > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> > index d754b1b7da77..9b806c1c60aa 100644
> > --- a/arch/arm64/kernel/cpufeature.c
> > +++ b/arch/arm64/kernel/cpufeature.c
> > @@ -2142,6 +2142,15 @@ bool cpu_supports_bbml3(void)
> >  		MIDR_ALL_VERSIONS(MIDR_NVIDIA_OLYMPUS),
> >  		MIDR_ALL_VERSIONS(MIDR_AMPERE1),
> >  		MIDR_ALL_VERSIONS(MIDR_AMPERE1A),
> > +		MIDR_ALL_VERSIONS(MIDR_CORTEX_A520AE),
> > +		MIDR_ALL_VERSIONS(MIDR_CORTEX_A715),
> > +		MIDR_ALL_VERSIONS(MIDR_CORTEX_A720AE),
> > +		MIDR_ALL_VERSIONS(MIDR_CORTEX_A725),
> > +		MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N3),
> > +		MIDR_ALL_VERSIONS(MIDR_C1_NANO),
> > +		MIDR_ALL_VERSIONS(MIDR_C1_PRO),
> > +		MIDR_REV_RANGE(MIDR_C1_ULTRA, 1, 1, 0xf),
> > +		MIDR_REV_RANGE(MIDR_C1_PREMIUM, 1, 1, 0xf),
> 
> Why do these two have a range? The commit message didn't mention this.

C1 ultra and C1 Premium has BBM related errata until r1p0.
Will mention that in commit message.

Thanks,
Linu Cherian.