[PATCH v2 2/2] arm64: dts: rockchip: Fix devices suspend freeze on RK3568/RK3566

[Michael Riesch]

Hi Jonas,

On 6/24/26 21:27, Jonas Karlman wrote:
> The EHCI/OHCI controller depends on clk_usbphy1_480m being enabled, or
> the system may freeze when registers are accessed, i.e. during suspend
> in ohci_suspend().
> 
> Add the missing clk_usbphy1_480m clocks reference to EHCI/OHCI
> controllers to ensure the clock is enabled when ECHI/OHCI registers are
> accessed to prevent a system freeze.
> 
> Fixes suspend pm_test issue with EHCI/OHCI devices due to the missing
> clk_usbphy1_480m reference and makes following pm_test modes work:
> 
>   echo N > /sys/module/printk/parameters/console_suspend
> 
>   echo devices > /sys/power/pm_test
>   echo platform > /sys/power/pm_test
>   echo processors > /sys/power/pm_test
>   echo core > /sys/power/pm_test
> 
>   echo mem > /sys/power/state
> 
> Fixes: 91c4c3e06a25 ("arm64: dts: rockchip: add usb2 nodes to rk3568 device tree")
> Fixes: 78f7186095db ("arm64: dts: rockchip: rename and sort the rk356x usb2 phy handles")
> Tested-by: Diederik de Haas <diederik at cknow-tech.com>
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>

Acked-by: Michael Riesch <michael.riesch at collabora.com>

Thanks and best regards,
Michael

> ---
> v2: Collect t-b tag
> ---
>  arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
> index a5832895bd39..c930a6fd6ea0 100644
> --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
> @@ -321,44 +321,44 @@ its: msi-controller at fd440000 {
>  	};
>  
>  	usb_host0_ehci: usb at fd800000 {
> -		compatible = "generic-ehci";
> +		compatible = "rockchip,rk3568-ehci", "generic-ehci";
>  		reg = <0x0 0xfd800000 0x0 0x40000>;
>  		interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
>  		clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>,
> -			 <&cru PCLK_USB>;
> +			 <&cru PCLK_USB>, <&usb2phy1>;
>  		phys = <&usb2phy1_otg>;
>  		phy-names = "usb";
>  		status = "disabled";
>  	};
>  
>  	usb_host0_ohci: usb at fd840000 {
> -		compatible = "generic-ohci";
> +		compatible = "rockchip,rk3568-ohci", "generic-ohci";
>  		reg = <0x0 0xfd840000 0x0 0x40000>;
>  		interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
>  		clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>,
> -			 <&cru PCLK_USB>;
> +			 <&cru PCLK_USB>, <&usb2phy1>;
>  		phys = <&usb2phy1_otg>;
>  		phy-names = "usb";
>  		status = "disabled";
>  	};
>  
>  	usb_host1_ehci: usb at fd880000 {
> -		compatible = "generic-ehci";
> +		compatible = "rockchip,rk3568-ehci", "generic-ehci";
>  		reg = <0x0 0xfd880000 0x0 0x40000>;
>  		interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
>  		clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>,
> -			 <&cru PCLK_USB>;
> +			 <&cru PCLK_USB>, <&usb2phy1>;
>  		phys = <&usb2phy1_host>;
>  		phy-names = "usb";
>  		status = "disabled";
>  	};
>  
>  	usb_host1_ohci: usb at fd8c0000 {
> -		compatible = "generic-ohci";
> +		compatible = "rockchip,rk3568-ohci", "generic-ohci";
>  		reg = <0x0 0xfd8c0000 0x0 0x40000>;
>  		interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
>  		clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>,
> -			 <&cru PCLK_USB>;
> +			 <&cru PCLK_USB>, <&usb2phy1>;
>  		phys = <&usb2phy1_host>;
>  		phy-names = "usb";
>  		status = "disabled";