[PATCH v3 27/47] arm_mpam: resctrl: Add support for 'MB' resource
Ben Horgan
ben.horgan at arm.com
Mon Jan 19 05:53:23 PST 2026
Hi Gavin,
On 1/19/26 11:53, Gavin Shan wrote:
> Hi Ben,
>
> On 1/13/26 12:58 AM, Ben Horgan wrote:
>> From: James Morse <james.morse at arm.com>
>>
>> resctrl supports 'MB', as a percentage throttling of traffic somewhere
>> after the L3. This is the control that mba_sc uses, so ideally the class
>> chosen should be as close as possible to the counters used for mba_local.
>>
>> MB's percentage control should be backed either with the fixed point
>> fraction MBW_MAX or bandwidth portion bitmaps. The bandwidth portion
>> bitmaps is not used as its tricky to pick which bits to use to avoid
>> contention, and may be possible to expose this as something other than a
>> percentage in the future.
>>
>> CC: Zeng Heng <zengheng4 at huawei.com>
>> Co-developed-by: Dave Martin <Dave.Martin at arm.com>
>> Signed-off-by: Dave Martin <Dave.Martin at arm.com>
>> Signed-off-by: James Morse <james.morse at arm.com>>
>> Signed-off-by: Ben Horgan <ben.horgan at arm.com>
>> ---
[...]
>> +static bool topology_matches_l3(struct mpam_class *victim)
>> +{
>> + int cpu, err;
>> + struct mpam_component *victim_iter;
>> + cpumask_var_t __free(free_cpumask_var) tmp_cpumask;
>> +
>
> A warning reported by checkpatch.pl like below.
>
> WARNING: Missing a blank line after declarations
> #117: FILE: drivers/resctrl/mpam_resctrl.c:375:
> + struct mpam_component *victim_iter;
> + cpumask_var_t __free(free_cpumask_var) tmp_cpumask;
I expect this is because __free() declarations don't need to be at the
top of a scope and so checkpatch doesn't treat them as normal
declarations. I don't think anything needs changing here.
>
> Besides, it'd better to initialize @tmp_cpumask:
>
> cpumask_var_t __free(free_cpumask_var) tmp_cpumask = CPUMASK_VAR_NULL;
Yep, I'll update.
>
>> + if (!alloc_cpumask_var(&tmp_cpumask, GFP_KERNEL))
>> + return false;
>> +
>> + guard(srcu)(&mpam_srcu);
>> + list_for_each_entry_srcu(victim_iter, &victim->components,
>> class_list,
>> + srcu_read_lock_held(&mpam_srcu)) {
>> + if (cpumask_empty(&victim_iter->affinity)) {
>> + pr_debug("class %u has CPU-less component %u - can't
>> match L3!\n",
>> + victim->level, victim_iter->comp_id);
>> + return false;
>> + }
>> +
>> + cpu = cpumask_any(&victim_iter->affinity);
>> + if (WARN_ON_ONCE(cpu >= nr_cpu_ids))
>> + return false;
>> +
>> + cpumask_clear(tmp_cpumask);
>> + err = find_l3_equivalent_bitmask(cpu, tmp_cpumask);
>> + if (err) {
>> + pr_debug("Failed to find L3's equivalent component to
>> class %u component %u\n",
>> + victim->level, victim_iter->comp_id);
>> + return false;
>> + }
>> +
>> + /* Any differing bits in the affinity mask? */
>> + if (!cpumask_equal(tmp_cpumask, &victim_iter->affinity)) {
>> + pr_debug("class %u component %u has Mismatched CPU mask
>> with L3 equivalent\n"
>> + "L3:%*pbl != victim:%*pbl\n",
>> + victim->level, victim_iter->comp_id,
>> + cpumask_pr_args(tmp_cpumask),
>> + cpumask_pr_args(&victim_iter->affinity));
>> +
>> + return false;
>> + }
>> + }
>> +
>> + return true;
>> +}
>> +
>> /* Test whether we can export MPAM_CLASS_CACHE:{2,3}? */
>> static void mpam_resctrl_pick_caches(void)
>> {
>> @@ -340,9 +455,62 @@ static void mpam_resctrl_pick_caches(void)
>> }
>> }
>> +static void mpam_resctrl_pick_mba(void)
>> +{
>> + struct mpam_class *class, *candidate_class = NULL;
>> + struct mpam_resctrl_res *res;
>> +
>> + lockdep_assert_cpus_held();
>> +
>> + guard(srcu)(&mpam_srcu);
>> + list_for_each_entry_srcu(class, &mpam_classes, classes_list,
>> + srcu_read_lock_held(&mpam_srcu)) {
>> + struct mpam_props *cprops = &class->props;
>> +
>> + if (class->level < 3) {
>> + pr_debug("class %u is before L3\n", class->level);
>> + continue;
>> + }
>> +
>> + if (!class_has_usable_mba(cprops)) {
>> + pr_debug("class %u has no bandwidth control\n",
>> + class->level);
>> + continue;
>> + }
>> +
>> + if (!cpumask_equal(&class->affinity, cpu_possible_mask)) {
>> + pr_debug("class %u has missing CPUs\n", class->level);
>> + continue;
>> + }
>> +
>> + if (!topology_matches_l3(class)) {
>> + pr_debug("class %u topology doesn't match L3\n",
>> + class->level);
>> + continue;
>> + }
>> +
>> + /*
>> + * mba_sc reads the mbm_local counter, and waggles the MBA
>> + * controls. mbm_local is implicitly part of the L3, pick a
>> + * resource to be MBA that as close as possible to the L3.
>> + */
>> + if (!candidate_class || class->level < candidate_class->level)
>> + candidate_class = class;
>> + }
>> +
>> + if (candidate_class) {
>> + pr_debug("selected class %u to back MBA\n",
>> + candidate_class->level);
>> + res = &mpam_resctrl_controls[RDT_RESOURCE_MBA];
>> + res->class = candidate_class;
>> + exposed_alloc_capable = true;
>> + }
>> +}
>> +
>> static int mpam_resctrl_control_init(struct mpam_resctrl_res *res)
>> {
>> struct mpam_class *class = res->class;
>> + struct mpam_props *cprops = &class->props;
>> struct rdt_resource *r = &res->resctrl_res;
>> switch (r->rid) {
>> @@ -372,6 +540,19 @@ static int mpam_resctrl_control_init(struct
>> mpam_resctrl_res *res)
>> */
>> r->cache.shareable_bits = resctrl_get_default_ctrl(r);
>> break;
>> + case RDT_RESOURCE_MBA:
>> + r->alloc_capable = true;
>> + r->schema_fmt = RESCTRL_SCHEMA_RANGE;
>> + r->ctrl_scope = RESCTRL_L3_CACHE;
>> +
>> + r->membw.delay_linear = true;
>> + r->membw.throttle_mode = THREAD_THROTTLE_UNDEFINED;
>> + r->membw.min_bw = get_mba_min(cprops);
>> + r->membw.max_bw = MAX_MBA_BW;
>> + r->membw.bw_gran = get_mba_granularity(cprops);
>> +
>> + r->name = "MB";
>> + break;
>> default:
>> return -EINVAL;
>> }
>> @@ -386,7 +567,17 @@ static int mpam_resctrl_pick_domain_id(int cpu,
>> struct mpam_component *comp)
>> if (class->type == MPAM_CLASS_CACHE)
>> return comp->comp_id;
>> - /* TODO: repaint domain ids to match the L3 domain ids */
>> + if (topology_matches_l3(class)) {
>> + /* Use the corresponding L3 component ID as the domain ID */
>> + int id = get_cpu_cacheinfo_id(cpu, 3);
>> +
>> + /* Implies topology_matches_l3() made a mistake */
>> + if (WARN_ON_ONCE(id == -1))
>> + return comp->comp_id;
>> +
>> + return id;
>> + }
>> +
>> /* Otherwise, expose the ID used by the firmware table code. */
>> return comp->comp_id;
>> }
>> @@ -426,6 +617,12 @@ u32 resctrl_arch_get_config(struct rdt_resource
>> *r, struct rdt_ctrl_domain *d,
>> case RDT_RESOURCE_L3:
>> configured_by = mpam_feat_cpor_part;
>> break;
>> + case RDT_RESOURCE_MBA:
>> + if (mpam_has_feature(mpam_feat_mbw_max, cprops)) {
>> + configured_by = mpam_feat_mbw_max;
>> + break;
>> + }
>> + fallthrough;
>> default:
>> return resctrl_get_default_ctrl(r);
>> }
>> @@ -437,6 +634,8 @@ u32 resctrl_arch_get_config(struct rdt_resource
>> *r, struct rdt_ctrl_domain *d,
>> switch (configured_by) {
>> case mpam_feat_cpor_part:
>> return cfg->cpbm;
>> + case mpam_feat_mbw_max:
>> + return mbw_max_to_percent(cfg->mbw_max, cprops);
>> default:
>> return resctrl_get_default_ctrl(r);
>> }
>> @@ -481,6 +680,13 @@ int resctrl_arch_update_one(struct rdt_resource
>> *r, struct rdt_ctrl_domain *d,
>> cfg.cpbm = cfg_val;
>> mpam_set_feature(mpam_feat_cpor_part, &cfg);
>> break;
>> + case RDT_RESOURCE_MBA:
>> + if (mpam_has_feature(mpam_feat_mbw_max, cprops)) {
>> + cfg.mbw_max = percent_to_mbw_max(cfg_val, cprops);
>> + mpam_set_feature(mpam_feat_mbw_max, &cfg);
>> + break;
>> + }
>> + fallthrough;
>> default:
>> return -EINVAL;
>> }
>> @@ -764,6 +970,7 @@ int mpam_resctrl_setup(void)
>> /* Find some classes to use for controls */
>> mpam_resctrl_pick_caches();
>> + mpam_resctrl_pick_mba();
>> /* Initialise the resctrl structures from the classes */
>> for_each_mpam_resctrl_control(res, rid) {
>
> Thanks,
> Gavin
>
Thanks,
Ben
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