[PATCH v4 1/3] media: dt-bindings: add rockchip mipi csi-2 receiver

[Sakari Ailus]

Hi Michael,

On Thu, Jan 15, 2026 at 07:26:07PM +0100, Michael Riesch via B4 Relay wrote:
> From: Michael Riesch <michael.riesch at collabora.com>
> 
> Add documentation for the Rockchip MIPI CSI-2 Receiver.
> 
> Signed-off-by: Michael Riesch <michael.riesch at wolfvision.net>
> Signed-off-by: Michael Riesch <michael.riesch at collabora.com>
> ---
>  .../bindings/media/rockchip,rk3568-mipi-csi2.yaml  | 141 +++++++++++++++++++++
>  MAINTAINERS                                        |   6 +
>  2 files changed, 147 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml
> new file mode 100644
> index 000000000000..2c2bd87582eb
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml

I'd add a compatible string for the base IP block and name it accordingly.

> @@ -0,0 +1,141 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/rockchip,rk3568-mipi-csi2.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip MIPI CSI-2 Receiver
> +
> +maintainers:
> +  - Michael Riesch <michael.riesch at collabora.com>
> +
> +description:
> +  The Rockchip MIPI CSI-2 Receiver is a CSI-2 bridge with one input port and
> +  one output port. It receives the data with the help of an external MIPI PHY
> +  (C-PHY or D-PHY) and passes it to the Rockchip Video Capture (VICAP) block.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - rockchip,rk3568-mipi-csi2
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    items:
> +      - description: Interrupt that signals changes in CSI2HOST_ERR1.
> +      - description: Interrupt that signals changes in CSI2HOST_ERR2.
> +
> +  interrupt-names:
> +    items:
> +      - const: err1
> +      - const: err2
> +
> +  clocks:
> +    maxItems: 1
> +
> +  phys:
> +    maxItems: 1
> +    description: MIPI C-PHY or D-PHY.
> +
> +  ports:
> +    $ref: /schemas/graph.yaml#/properties/ports
> +
> +    properties:
> +      port at 0:
> +        $ref: /schemas/graph.yaml#/$defs/port-base
> +        unevaluatedProperties: false
> +        description: Input port node. Connect to e.g., a MIPI CSI-2 image sensor.
> +
> +        properties:
> +          endpoint:
> +            $ref: video-interfaces.yaml#
> +            unevaluatedProperties: false
> +
> +            properties:
> +              bus-type:
> +                enum:
> +                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY
> +                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
> +
> +              data-lanes:
> +                minItems: 1
> +                maxItems: 4
> +
> +            required:
> +              - bus-type
> +              - data-lanes
> +
> +      port at 1:
> +        $ref: /schemas/graph.yaml#/properties/port
> +        description: Output port connected to a Rockchip VICAP port.
> +
> +    required:
> +      - port at 0
> +      - port at 1
> +
> +  power-domains:
> +    maxItems: 1
> +
> +  resets:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - phys
> +  - ports
> +  - power-domains
> +  - resets
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/rk3568-cru.h>
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/media/video-interfaces.h>
> +    #include <dt-bindings/power/rk3568-power.h>
> +
> +    soc {
> +        interrupt-parent = <&gic>;
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        csi: csi at fdfb0000 {
> +            compatible = "rockchip,rk3568-mipi-csi2";

This would become e.g.

            compatible = "rockchip,rk3568-mipi-csi2", "snps,dw-mipi-csi2rx";

See my comments on the driver patch as well.

> +            reg = <0x0 0xfdfb0000 0x0 0x10000>;
> +            interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
> +                         <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> +            interrupt-names = "err1", "err2";
> +            clocks = <&cru PCLK_CSI2HOST1>;
> +            phys = <&csi_dphy>;
> +            power-domains = <&power RK3568_PD_VI>;
> +            resets = <&cru SRST_P_CSI2HOST1>;
> +
> +            ports {
> +                #address-cells = <1>;
> +                #size-cells = <0>;
> +
> +                csi_in: port at 0 {
> +                    reg = <0>;
> +
> +                    csi_input: endpoint {
> +                        bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
> +                        data-lanes = <1 2 3 4>;
> +                        remote-endpoint = <&imx415_output>;
> +                    };
> +                };
> +
> +                csi_out: port at 1 {
> +                    reg = <1>;
> +
> +                    csi_output: endpoint {
> +                        remote-endpoint = <&vicap_mipi_input>;
> +                    };
> +                };
> +            };
> +        };
> +    };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index fc68ee0c68c0..965132e0933a 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -25364,6 +25364,12 @@ S:	Maintained
>  F:	drivers/i2c/busses/i2c-designware-amdisp.c
>  F:	include/linux/soc/amd/isp4_misc.h
>  
> +SYNOPSYS DESIGNWARE MIPI CSI-2 RECEIVER DRIVER
> +M:	Michael Riesch <michael.riesch at collabora.com>
> +L:	linux-media at vger.kernel.org
> +S:	Maintained
> +F:	Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml
> +
>  SYNOPSYS DESIGNWARE MMC/SD/SDIO DRIVER
>  M:	Jaehoon Chung <jh80.chung at samsung.com>
>  M:	Shawn Lin <shawn.lin at rock-chips.com>
> 

-- 
Kind regards,

Sakari Ailus