[PATCH v2 1/5] arm64: dts: ti: k3-j722s-ti-ipc-firmware: Add memory pool for DSP i/o buffers
Andrew Davis
afd at ti.com
Wed Jan 14 09:53:05 PST 2026
On 1/14/26 2:46 AM, Tomeu Vizoso wrote:
> This memory region is used by the DRM/accel driver to allocate addresses
> for buffers that are used for communication with the DSP cores and for
> their intermediate results.
>
> Signed-off-by: Tomeu Vizoso <tomeu at tomeuvizoso.net>
> ---
> arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi
> index 3fbff927c4c08bce741555aa2753a394b751144f..b80d2a5a157ad59eaed8e57b22f1f4bce4765a85 100644
> --- a/arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi
> @@ -42,6 +42,11 @@ c7x_0_memory_region: memory at a3100000 {
> no-map;
> };
>
> + c7x_iova_pool: iommu-pool at a7000000 {
> + reg = <0x00 0xa7000000 0x00 0x18200000>;
> + no-map;
Could you expand on why this carveout is needed? The C7 NPU has a full
MMU and should be able to work with any buffer Linux allocates from any
address, even non-contiguous buffers too.
Communication should already happen over the existing RPMSG channels
without needing extra buffers. And space for intermediate results
should be provided dynamically by the drivers (I believe that would
match how GPUs without dedicated memory handle getting intermediate
buffers space from system memory these days, but do correct me if
I'm wrong about that one).
Andrew
> + };
> +
> c7x_1_dma_memory_region: memory at a4000000 {
> compatible = "shared-dma-pool";
> reg = <0x00 0xa4000000 0x00 0x100000>;
> @@ -151,13 +156,15 @@ &main_r5fss0_core0 {
> &c7x_0 {
> mboxes = <&mailbox0_cluster2 &mbox_c7x_0>;
> memory-region = <&c7x_0_dma_memory_region>,
> - <&c7x_0_memory_region>;
> + <&c7x_0_memory_region>,
> + <&c7x_iova_pool>;
> status = "okay";
> };
>
> &c7x_1 {
> mboxes = <&mailbox0_cluster3 &mbox_c7x_1>;
> memory-region = <&c7x_1_dma_memory_region>,
> - <&c7x_1_memory_region>;
> + <&c7x_1_memory_region>,
> + <&c7x_iova_pool>;
> status = "okay";
> };
>
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