[PATCH] usb: dwc3: Always deassert xilinx resets

[Thinh Nguyen]

On Fri, Jan 09, 2026, Sean Anderson wrote:
> On 1/9/26 01:01, Pandey, Radhey Shyam wrote:
> > [AMD Official Use Only - AMD Internal Distribution Only]
> > 
> >> -----Original Message-----
> >> From: Thinh Nguyen <Thinh.Nguyen at synopsys.com>
> >> Sent: Friday, January 9, 2026 6:19 AM
> >> To: Sean Anderson <sean.anderson at linux.dev>
> >> Cc: Thinh Nguyen <Thinh.Nguyen at synopsys.com>; open list:DESIGNWARE
> >> USB3 DRD IP DRIVER <linux-usb at vger.kernel.org>; Frager, Neal
> >> <neal.frager at amd.com>; Simek, Michal <michal.simek at amd.com>; open list
> >> <linux-kernel at vger.kernel.org>; moderated list:ARM/ZYNQ ARCHITECTURE
> >> <linux-arm-kernel at lists.infradead.org>; Philipp Zabel <p.zabel at pengutronix.de>;
> >> Pandey, Radhey Shyam <radhey.shyam.pandey at amd.com>; Greg Kroah-Hartman
> >> <gregkh at linuxfoundation.org>
> >> Subject: Re: [PATCH] usb: dwc3: Always deassert xilinx resets
> >>
> >> On Tue, Jan 06, 2026, Sean Anderson wrote:
> >> > If we don't have a usb3 phy we don't need to assert the core resets.
> >> > Deassert them even if we didn't assert them to support booting when
> >> > the bootloader never released the core from reset.
> > Is it a customized bootloader ? i.e it assert reset but don't deassert.
> 
> No. Most peripheral resets are asserted on PoR. So if the bootloader
> doesn't deassert them then Linux has to.
> 
> My goal is to make init_serdes() in psu_init_gpl.c optional and do all
> serdes initialization in the phy driver (and in the consumer drivers). I
> have this working for DP/PCIe. I'm working on SATA, and I don't think
> USB/SGMII need much special. This gives the following advantages:
> 
> - On some boards (mine) the reference clocks may not be configured in
>   SPL/FSBL. So ILL calibration will fail (and take a long time to do so)
>   unless we defer initialization to U-Boot/Linux where the phy driver
>   can request the clocks.
> - If PCIe/SATA are not used in U-Boot, ILL calibration can be deferred
>   until Linux when it can be done it parallel with other initialization.
> - We will have flexibility to switch between different serdes
>   configurations at runtime. For example, this could allow the
>   bootloader to fixup the devicetree to support PCIe and SATA M.2
>   drives, depending on what the user has plugged in.
> 
> > I think ideally core /APB reset should be done independent on
> > MAC 2.0/3.0 configuration.
> 
> I agree, but I think the existing code does this optimization to reduce
> boot time when the bootloader has already initialized USB. I have
> preserved that in this patch.
> 

I think all this info is useful. Can we include it in the change log?

Thanks,
Thinh