[PATCH 00/11] bus: add stm32 debug bus and coresight support for stm32mp1x platforms
Gatien CHEVALLIER
gatien.chevallier at foss.st.com
Mon Jan 12 07:56:45 PST 2026
On 1/10/26 00:10, Linus Walleij wrote:
> Hi Gatien,
>
> thanks for your patch series!
>
> On Fri, Jan 9, 2026 at 11:56 AM Gatien Chevallier
> <gatien.chevallier at foss.st.com> wrote:
>
>> Stm32 SoCs embed debug peripherals such as Coresight. These peripherals
>> can monitor the activity of the cores. Because of that, they can be
>> used only if some features in the debug configuration are enabled.
>> Else, errors or firewall exceptions can be observed. Similarly to
>> the ETZPC(on stm32mp1x platforms) or the RIFSC(on stm32mp2x platforms),
>> debug-related peripherals access can be assessed at bus level to
>> prevent these issues from happening.
>>
>> The debug configuration can only be accessed by the secure world.
>> That means that a service must be implemented in the secure world for
>> the kernel to check the firewall configuration. On OpenSTLinux, it is
>> done through a Debug access PTA in OP-TEE [1].
>> To represent the debug peripherals present on a dedicated debug bus,
>> create a debug bus node in the device tree and the associated driver
>> that will interact with this PTA.
>>
>> [1]: https://github.com/OP-TEE/optee_os/pull/7673
>>
>> Signed-off-by: Gatien Chevallier <gatien.chevallier at foss.st.com>
>
> I think Jens Wiklander wants to have a look at this partch
> series, so added him to the To:.
>
> Yours,
> Linus Walleij
Hi Linus,
Sure, I'll keep the To. addition for V2, thank you.
Best regards,
Gatien
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