[PATCH] arm64: dts: ti: k3-am62a7-sk: Disable mmc Schmitt Trigger

[Markus Schneider-Pargmann]

Hi Alexander,

On Wed Jan 7, 2026 at 3:49 PM CET, Alexander Sverdlin wrote:
> Hi Markus,
>
> On Tue, 2026-01-06 at 18:25 +0100, Alexander Sverdlin wrote:
>> >  	main_mmc1_pins_default: main-mmc1-default-pins {
>> >  		pinctrl-single,pins = <
>> > -			AM62AX_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
>
> this is a bit trial-and-error, but maybe you could try to add missing clock
> retimer/loopback pin for test instead of disabling ST? Would this help:
>
> 			AM62AX_IOPAD(0x238, PIN_INPUT, 0) /* (N/A) MMC1_CLKLB */
>
> some SoCs from AM6x family seem to require it even though TRMs claim the default
> PoR state is the proper one.

Thanks, but adding that does not help unfortunately. And it seems ST
being enabled on that pin does not break it either. The data lines seem
to be the important ones.

Best
Markus

>
>> > -			AM62AX_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */
>> > -			AM62AX_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */
>> > -			AM62AX_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */
>> > -			AM62AX_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */
>> > -			AM62AX_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */
>> > -			AM62AX_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */
>> 
>> All of these have ST enabled on PoR, according to TRM.
>> 
>> > +			AM62AX_IOPAD(0x23c, PIN_INPUT_NOST, 0) /* (A21) MMC1_CMD */
>> > +			AM62AX_IOPAD(0x234, PIN_INPUT_NOST, 0) /* (B22) MMC1_CLK */
>> > +			AM62AX_IOPAD(0x230, PIN_INPUT_NOST, 0) /* (A22) MMC1_DAT0 */
>> > +			AM62AX_IOPAD(0x22c, PIN_INPUT_NOST, 0) /* (B21) MMC1_DAT1 */
>> > +			AM62AX_IOPAD(0x228, PIN_INPUT_NOST, 0) /* (C21) MMC1_DAT2 */
>> > +			AM62AX_IOPAD(0x224, PIN_INPUT_NOST, 0) /* (D22) MMC1_DAT3 */
>> > +			AM62AX_IOPAD(0x240, PIN_INPUT_NOST, 0) /* (D17) MMC1_SDCD */
>> >  		>;
>> >  		bootph-all;
>> >  	};

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