[PATCH v2 11/36] KVM: arm64: gic-v5: Support GICv5 FGTs & FGUs

[Jonathan Cameron]

On Fri, 19 Dec 2025 15:52:39 +0000
Sascha Bischoff <Sascha.Bischoff at arm.com> wrote:

> Extend the existing FGT/FGU infrastructure to include the GICv5 trap
> registers (ICH_HFGRTR_EL2, ICH_HFGWTR_EL2, ICH_HFGITR_EL2). This
> involves mapping the trap registers and their bits to the
> corresponding feature that introduces them (FEAT_GCIE for all, in this
> case), and mapping each trap bit to the system register/instruction
> controlled by it.
> 
> As of this change, none of the GICv5 instructions or register accesses
> are being trapped.
> 
> Signed-off-by: Sascha Bischoff <sascha.bischoff at arm.com>
Hi Sascha,

Superficial stuff only on code flow to make it easier to extend next
time.

Jonathan


> diff --git a/arch/arm64/kvm/config.c b/arch/arm64/kvm/config.c
> index 3845b188551b6..5f57dc07cc482 100644
> --- a/arch/arm64/kvm/config.c
> +++ b/arch/arm64/kvm/config.c

> @@ -1511,11 +1595,19 @@ void kvm_vcpu_load_fgt(struct kvm_vcpu *vcpu)
>  	__compute_fgt(vcpu, HAFGRTR_EL2);
>  
>  	if (!cpus_have_final_cap(ARM64_HAS_FGT2))
> -		return;
> +		goto skip_fgt2;

Nicer to avoid more complex code flow and just make the next
block an if.

	if (cpus_have_final_cap(ARM64_HAS_FGT2)) {
		__compute_fgt(vcpu, HFGRTR2_EL2);
		__compute_fgt(vcpu, HFGWTR2_EL2);
		__compute_fgt(vcpu, HFGITR2_EL2);
		__compute_fgt(vcpu, HDFGRTR2_EL2);
		__compute_fgt(vcpu, HDFGWTR2_EL2);
	}
>  
>  	__compute_fgt(vcpu, HFGRTR2_EL2);
>  	__compute_fgt(vcpu, HFGWTR2_EL2);
>  	__compute_fgt(vcpu, HFGITR2_EL2);
>  	__compute_fgt(vcpu, HDFGRTR2_EL2);
>  	__compute_fgt(vcpu, HDFGWTR2_EL2);
> +
> +skip_fgt2:
> +	if (!cpus_have_final_cap(ARM64_HAS_GICV5_CPUIF))
Given the above shows this code sometimes gets extended I'd
be tempted to just go with
	if (cpus_have_final_cap(ARM64_HAS_GICV5_CPUIF)) {
		__compute_fgt(vcpu, ICH_HFGRTR_EL2);
		__compute_fgt(vcpu, ICH_HFGWTR_EL2);
		__compute_fgt(vcpu, ICH_HFGITR_EL2);
	}

From the start and avoid future churn or goto nasties.

>	
> +		return;
> +
> +	__compute_fgt(vcpu, ICH_HFGRTR_EL2);
> +	__compute_fgt(vcpu, ICH_HFGWTR_EL2);
> +	__compute_fgt(vcpu, ICH_HFGITR_EL2);
>  }