[PATCH v4 3/7] arm64: dts: rockchip: rv1126b: Add pinconf and pinctrl dtsi for rv1126b

[Linus Walleij]

Hi Ye,

thanks for your patch!

On Sat, Dec 27, 2025 at 12:55 PM Ye Zhang <ye.zhang at rock-chips.com> wrote:

> +       /omit-if-no-ref/
> +       pcfg_pull_none_drv_level_4_00: pcfg-pull-none-drv-level-4-00 {
> +               bias-disable;
> +               drive-strength = <0x2c>;

Normally drive-strength should be in mA, it is very strange to use hex
for an SI unit.

> +&pinctrl {
> +       aupll_clk {
> +               /omit-if-no-ref/
> +               aupll_clk_pins: aupll-clk-pins {
> +                       rockchip,pins =
> +                               /* aupll_clk_in */
> +                               <7 RK_PA1 1 &pcfg_pull_none>;

This looks better as:

pinmux = <7 << 16 | RK_PA1 << 8 | 1>;
bias-none;
drive-strength = <...>;

It's just weird to have the phandle at the end of the
pins creating something "necessarily different" from what
everyone else is doing.

I would change the bindings, driver and whatever script
generates this to use pinmux.

I understand this scheme looks comfortable when just doing
Rockchip all day, but as subsystem maintainer I need to
take into consideration how this will look for people working
with multiple SoC:s and maintenance, and anything different
from standard pinmux = <>; is just a big pain.

Yours,
Linus Walleij