[PATCH v2 13/45] KVM: arm64: Force guest EL1 to use user-space's partid configuration
Ben Horgan
ben.horgan at arm.com
Fri Jan 2 03:48:15 PST 2026
Hi Oliver,
On 12/19/25 20:10, Oliver Upton wrote:
> On Fri, Dec 19, 2025 at 06:11:15PM +0000, Ben Horgan wrote:
>> From: James Morse <james.morse at arm.com>
>>
>> While we trap the guest's attempts to read/write the MPAM control
>> registers, the hardware continues to use them. Guest-EL0 uses KVM's
>> user-space's configuration, as the value is left in the register, and
>> guest-EL1 uses either the host kernel's configuration, or in the case of
>> VHE, the UNKNOWN reset value of MPAM1_EL1.
>>
>> We want to force the guest-EL1 to use KVM's user-space's MPAM
>> configuration. On nVHE rely on MPAM0_EL1 and MPAM1_EL1 always being
>> programmed the same and on VHE copy MPAM0_EL1 into the guest's
>> MPAM1_EL1. There is no need to restore as this is out of context once TGE
>> is set.
>>
>> Signed-off-by: James Morse <james.morse at arm.com>
>> Signed-off-by: Ben Horgan <ben.horgan at arm.com>
>> ---
>> Changes since rfc:
>> Drop the unneeded __mpam_guest_load() in nvhre and the MPAM1_EL1 save restore
>> Defer EL2 handling until next patch
>> ---
>> arch/arm64/kvm/hyp/vhe/sysreg-sr.c | 11 +++++++++++
>> 1 file changed, 11 insertions(+)
>>
>> diff --git a/arch/arm64/kvm/hyp/vhe/sysreg-sr.c b/arch/arm64/kvm/hyp/vhe/sysreg-sr.c
>> index f28c6cf4fe1b..a2e8f6187675 100644
>> --- a/arch/arm64/kvm/hyp/vhe/sysreg-sr.c
>> +++ b/arch/arm64/kvm/hyp/vhe/sysreg-sr.c
>> @@ -183,6 +183,16 @@ void sysreg_restore_guest_state_vhe(struct kvm_cpu_context *ctxt)
>> }
>> NOKPROBE_SYMBOL(sysreg_restore_guest_state_vhe);
>>
>> +/*
>> + * The _EL0 value was written by the host's context switch and belongs to the
>> + * VMM. Copy this into the guest's _EL1 register.
>> + */
>> +static inline void __mpam_guest_load(void)
>> +{
>> + if (system_supports_mpam())
>> + write_sysreg_el1(read_sysreg_s(SYS_MPAM0_EL1), SYS_MPAM1);
>
> nit: I'd prefer using a mask to extract the fields of interest, guarding
> against future architecture doing something silly with the RES0 fields
> of these registers.
Sure, I'll make this change.
>
> Thanks,
> Oliver
Thanks,
Ben
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