[PATCH AUTOSEL 6.18-5.10] clk: keystone: don't cache clock rate

[Sasha Levin]

From: Michael Walle <mwalle at kernel.org>

[ Upstream commit a80b32a140c8612bbaed27009c383d43304db6d5 ]

The TISCI firmware will return 0 if the clock or consumer is not
enabled although there is a stored value in the firmware. IOW a call to
set rate will work but at get rate will always return 0 if the clock is
disabled.
The clk framework will try to cache the clock rate when it's requested
by a consumer. If the clock or consumer is not enabled at that point,
the cached value is 0, which is wrong. Thus, disable the cache
altogether.

Signed-off-by: Michael Walle <mwalle at kernel.org>
Reviewed-by: Kevin Hilman <khilman at baylibre.com>
Reviewed-by: Randolph Sapp <rs at ti.com>
Reviewed-by: Nishanth Menon <nm at ti.com>
Signed-off-by: Antonios Christidis <a-christidis at ti.com>
Reviewed-by: Brian Masney <bmasney at redhat.com>
Link: https://patch.msgid.link/20260507-clk-sci-v2-1-38f59b48777a@ti.com
Signed-off-by: Nishanth Menon <nm at ti.com>
Signed-off-by: Sasha Levin <sashal at kernel.org>
---

LLM Generated explanations, may be completely bogus:

The background checks finished:

- **Commit presence:** `a80b32a140c86` is **not** in the local 6.18.44
  tree (as expected from the analysis).
- **Related GPU commits:** No separate `drm/imagination` clock-control
  fix turned up on mainline — the `sci-clk` NOCACHE change is the
  standalone fix from the J722S GPU bring-up work.

The earlier analysis stands: **YES** for backport to this tree.

 drivers/clk/keystone/sci-clk.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/clk/keystone/sci-clk.c b/drivers/clk/keystone/sci-clk.c
index a4b42811de55d..066823458a75c 100644
--- a/drivers/clk/keystone/sci-clk.c
+++ b/drivers/clk/keystone/sci-clk.c
@@ -333,6 +333,14 @@ static int _sci_clk_build(struct sci_clk_provider *provider,
 
 	init.ops = &sci_clk_ops;
 	init.num_parents = sci_clk->num_parents;
+
+	/*
+	 * A clock rate query to the SCI firmware will return 0 if either the
+	 * clock itself is disabled or the attached device/consumer is disabled.
+	 * This makes it inherently unsuitable for the caching of the clk
+	 * framework.
+	 */
+	init.flags = CLK_GET_RATE_NOCACHE;
 	sci_clk->hw.init = &init;
 
 	ret = devm_clk_hw_register(provider->dev, &sci_clk->hw);
-- 
2.53.0